Lines Matching refs:Segment
62 SDValue Segment;
73 Segment(), GV(0), CP(0), BlockAddr(0), ES(0), JT(-1), Align(0),
197 SDValue &Segment);
201 SDValue &Segment);
204 SDValue &Segment);
207 SDValue &Segment);
211 SDValue &Segment,
217 SDValue &Segment);
229 SDValue &Disp, SDValue &Segment) {
257 if (AM.Segment.getNode())
258 Segment = AM.Segment;
260 Segment = CurDAG->getRegister(0, MVT::i32);
607 // load gs:0 -> GS segment register.
608 // load fs:0 -> FS segment register.
614 if (C->getSExtValue() == 0 && AM.Segment.getNode() == 0 &&
618 AM.Segment = CurDAG->getRegister(X86::GS, MVT::i16);
621 AM.Segment = CurDAG->getRegister(X86::FS, MVT::i16);
1167 (AM.Segment.getNode() && !Backup.Segment.getNode()) >= 2)
1303 SDValue &Disp, SDValue &Segment) {
1318 AM.Segment = CurDAG->getRegister(X86::GS, MVT::i16);
1320 AM.Segment = CurDAG->getRegister(X86::FS, MVT::i16);
1335 getAddressOperands(AM, Base, Scale, Index, Disp, Segment);
1349 SDValue &Disp, SDValue &Segment,
1358 if (!SelectAddr(LD, LD->getBasePtr(), Base, Scale, Index, Disp, Segment))
1376 if (!SelectAddr(LD, LD->getBasePtr(), Base, Scale, Index, Disp, Segment))
1415 SDValue &Disp, SDValue &Segment) {
1416 if (!SelectLEAAddr(N, Base, Scale, Index, Disp, Segment))
1455 SDValue &Segment) {
1458 // Set AM.Segment to prevent MatchAddress from using one. LEA doesn't support
1460 SDValue Copy = AM.Segment;
1462 AM.Segment = T;
1465 assert (T == AM.Segment);
1466 AM.Segment = Copy;
1509 getAddressOperands(AM, Base, Scale, Index, Disp, Segment);
1516 SDValue &Disp, SDValue &Segment) {
1533 getAddressOperands(AM, Base, Scale, Index, Disp, Segment);
1541 SDValue &Segment) {
1548 N.getOperand(1), Base, Scale, Index, Disp, Segment);
2034 // Memory Operands: Base, Scale, Index, Disp, Segment
2036 SDValue Segment = CurDAG->getRegister(0, MVT::i32);
2038 Disp, Segment, VMask, Chain};
2747 SDValue Base, Scale, Index, Disp, Segment;
2749 Base, Scale, Index, Disp, Segment))
2755 const SDValue Ops[] = { Base, Scale, Index, Disp, Segment, InputChain };
