Lines Matching defs:Extract
72 // Extract from UNDEF is UNDEF.
76 // Extract the relevant vectorWidth bits. Generate an EXTRACT_SUBVECTOR
1261 // Extract subvector is special because the value type
1400 // Extract subvector is special because the value type
4239 /// EXTRACT_SUBVECTOR operand specifies a vector extract that is
4240 /// suitable for instruction that extract 128 or 256 bit vectors
4397 llvm_unreachable("Illegal extract subvector for VEXTRACT");
4425 /// to extract the specified EXTRACT_SUBVECTOR index with VEXTRACTF128
4432 /// to extract the specified EXTRACT_SUBVECTOR index with VEXTRACTF64x4
4801 // Extract the 128-bit part containing the splat element and update
6355 // before falling through to the insert/extract cleanup.
6466 // using a single extract together, load it and store it.
6475 // If Elt1 is defined, extract it from the appropriate source. If the
6489 // If Elt0 is defined, extract it from the appropriate source. If the
6718 // Extract the vector element by hand.
7079 // In this case we should extract subvector from V.
7477 SDValue Extract = DAG.getNode(X86ISD::PEXTRB, dl, MVT::i32,
7479 SDValue Assert = DAG.getNode(ISD::AssertZext, dl, MVT::i32, Extract,
7494 SDValue Extract = DAG.getNode(X86ISD::PEXTRW, dl, MVT::i32,
7496 SDValue Assert = DAG.getNode(ISD::AssertZext, dl, MVT::i32, Extract,
7516 SDValue Extract
7520 return DAG.getNode(ISD::BITCAST, dl, MVT::f32, Extract);
7541 // If this is a 256-bit vector result, first extract the 128-bit vector and
7542 // then extract the element from the 128-bit vector.
7581 SDValue Extract = DAG.getNode(X86ISD::PEXTRW, dl, EltVT,
7583 SDValue Assert = DAG.getNode(ISD::AssertZext, dl, EltVT, Extract,
7658 // bits. For example (insert (extract, 3), 2) could be matched by putting
7687 // If this is a 256-bit vector result, first extract the 128-bit vector,
9650 // Extract the LHS vectors
9655 // Extract the RHS vectors
11848 // Extract the LHS vectors
11853 // Extract the RHS vectors
11897 // Extract the odd parts.
12393 // Extract the two vectors
12527 // Extract the LHS vectors
15657 /// XFormVExtractWithShuffleIntoLoad - Check if a vector extract from a target
15699 // Select the input vector, guarding against out of range extract vector.
15754 /// to a simple store and scalar loads to extract the elements.
15786 SDNode *Extract = *UI;
15787 if (Extract->getOpcode() != ISD::EXTRACT_VECTOR_ELT)
15790 if (Extract->getValueType(0) != MVT::i32)
15792 if (!Extract->hasOneUse())
15794 if (Extract->use_begin()->getOpcode() != ISD::SIGN_EXTEND &&
15795 Extract->use_begin()->getOpcode() != ISD::ZERO_EXTEND)
15797 if (!isa<ConstantSDNode>(Extract->getOperand(1)))
15802 1 << cast<ConstantSDNode>(Extract->getOperand(1))->getZExtValue();
15804 Uses.push_back(Extract);
15819 // Replace each use (extract) with a load of the appropriate element.
15822 SDNode *Extract = *UI;
15825 SDValue Idx = Extract->getOperand(1);
15836 SDValue LoadScalar = DAG.getLoad(Extract->getValueType(0), dl, Ch,
15841 DAG.ReplaceAllUsesOfValueWith(SDValue(Extract, 0), LoadScalar);
