Lines Matching defs:IDX
99 /// instructions or a simple subregister reference. Idx is an index in the
143 /// simple superregister reference. Idx is an index in the 128 bits
3651 int Idx = Mask[i+l];
3654 if (!isUndefOrInRange(Idx, l, l+NumLaneElts) &&
3655 !isUndefOrInRange(Idx, l+NumElts, l+NumElts+NumLaneElts))
3659 if (l != 0 && Mask[i] >= 0 && !isUndefOrEqual(Idx, Mask[i]+l))
3662 if (Idx >= (int)NumElts)
3663 Idx -= NumElts - NumLaneElts;
3665 if (!isUndefOrEqual(Idx, Start+i))
3679 int idx = Mask[i];
3680 if (idx < 0)
3682 else if (idx < (int)NumElems)
3683 Mask[i] = idx + NumElems;
3685 Mask[i] = idx - NumElems;
3727 int Idx = Mask[i+l];
3729 if (!isUndefOrInRange(Idx, RngStart, RngStart+NumLaneElems))
3736 if (!isUndefOrEqual(Idx, Mask[i]+l))
4492 int Idx = SVOp->getMaskElt(i);
4493 if (Idx >= 0) {
4494 if (Idx < (int)NumElems)
4495 Idx += NumElems;
4497 Idx -= NumElems;
4499 MaskVec.push_back(Idx);
4611 int Idx = N->getMaskElt(i);
4612 if (Idx >= (int)NumElems) {
4617 !X86::isZeroNode(V2.getOperand(Idx-NumElems)))
4619 } else if (Idx >= 0) {
4624 !X86::isZeroNode(V1.getOperand(Idx)))
4830 /// Idx. This produces a shuffle mask like 4,1,2,3 (idx=0) or 0,1,2,4 (idx=3).
4831 static SDValue getShuffleVectorZeroOrUndef(SDValue V2, unsigned Idx,
4841 // If this is the insertion idx, put the low elt of V2 here.
4842 MaskVec.push_back(i == Idx ? NumElems : i);
5028 int Idx = SVOp->getMaskElt(i);
5030 if (Idx < 0)
5033 if (Idx < (int)NumElems)
5039 if ((Idx % NumElems != OpIdx) || (SeenV1 && SeenV2))
5583 unsigned Idx = cast<ConstantSDNode>(ExtIdx)->getZExtValue();
5586 Mask[i] = Idx;
5588 Mask[i] = Idx + NumElems;
5597 unsigned Idx = InsertIndices[i];
5598 NV = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, VT, NV, Op.getOperand(Idx),
5599 DAG.getIntPtrConstant(Idx));
5632 for (unsigned idx = 0, e = Op.getNumOperands(); idx < e; ++idx) {
5633 SDValue In = Op.getOperand(idx);
5641 Immediate |= (1ULL << idx);
5772 unsigned Idx = countTrailingZeros(NonZeros);
5773 SDValue Item = Op.getOperand(Idx);
5781 (!IsAllConstants || Idx == 0)) {
5795 // a vector. If Idx != 0, swizzle it into place.
5796 if (Idx != 0) {
5798 Mask.push_back(Idx);
5812 if (Idx == 0) {
5844 if (NumElems == 2 && Idx == 1 &&
5869 MaskVec.push_back(i == Idx ? 0 : 1);
5881 unsigned Idx = countTrailingZeros(NonZeros);
5882 SDValue Item = Op.getOperand(Idx);
5916 unsigned Idx = countTrailingZeros(NonZeros);
5918 Op.getOperand(Idx));
5919 return getShuffleVectorZeroOrUndef(V2, Idx, true, Subtarget, DAG);
6214 int idx = MaskVals[i];
6215 if (idx != (int)i)
6217 if (idx < 0 || (idx/4) == BestLoQuad || (idx/4) == BestHiQuad)
6226 int idx = MaskVals[i];
6227 if (idx < 0)
6229 idx = MaskVals[i] = (idx / 4) == BestLoQuad ? (idx & 3) : (idx & 3) + 4;
6230 if ((idx != i) && idx < 4)
6232 if ((idx != i) && idx > 3)
6310 int idx = MaskVals[i];
6311 if (idx < 0) {
6313 } else if ((idx / 4) == BestLoQuad) {
6314 MaskV[i] = idx & 3;
6334 int idx = MaskVals[i];
6335 if (idx < 0) {
6337 } else if ((idx / 4) == BestHiQuad) {
6338 MaskV[i] = (idx & 3) + 4;
6665 int Idx = SVOp->getMaskElt(i+LaneStart);
6666 if (Idx < 0) {
6673 int Input = Idx / NumLaneElems;
6676 Idx -= Input * NumLaneElems;
6699 Mask.push_back(Idx + OpNo * NumLaneElems);
6706 int Idx = SVOp->getMaskElt(i+LaneStart);
6707 if (Idx < 0) {
6713 int Input = Idx / NumElems;
6716 Idx -= Input * NumElems;
6721 DAG.getIntPtrConstant(Idx)));
6767 int Idx = PermMask[i];
6768 if (Idx < 0) {
6771 assert(Idx < 8 && "Invalid VECTOR_SHUFFLE index!");
6772 if (Idx < 4) {
6774 Mask1[NumLo] = Idx;
6779 Mask1[2+NumHi] = Idx;
6796 unsigned Idx = (i < 2) ? 0 : 4;
6797 Idx += Locs[i].first * 2 + Locs[i].second;
6798 Mask2[i] = Idx;
6868 int Idx = PermMask[i];
6869 if (Idx < 0) {
6871 } else if (Idx < 4) {
6873 MaskPtr[LoIdx] = Idx;
6877 MaskPtr[HiIdx] = Idx;
7485 unsigned Idx = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
7486 // If Idx is 0, it's cheaper to do a move instead of a pextrw.
7487 if (Idx == 0)
7544 SDValue Idx = Op.getOperand(1);
7545 unsigned IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
7572 unsigned Idx = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
7573 if (Idx == 0)
7589 unsigned Idx = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
7590 if (Idx == 0)
7594 int Mask[4] = { static_cast<int>(Idx), -1, -1, -1 };
7606 unsigned Idx = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
7607 if (Idx == 0)
7763 SDValue Idx = Op.getOperand(1);
7764 unsigned IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
7771 isa<ConstantSDNode>(Idx)) {
7775 isa<ConstantSDNode>(Idx)) {
7791 SDValue Idx = Op.getNode()->getOperand(2);
7796 isa<ConstantSDNode>(Idx)) {
7797 unsigned IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
7803 isa<ConstantSDNode>(Idx)) {
7804 unsigned IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
8266 SDValue IDX = DAG.getExternalSymbol("_tls_index", getPointerTy());
8268 IDX = DAG.getExtLoad(ISD::ZEXTLOAD, dl, getPointerTy(), Chain,
8269 IDX, MachinePointerInfo(), MVT::i32,
8272 IDX = DAG.getLoad(getPointerTy(), dl, Chain, IDX, MachinePointerInfo(),
8277 IDX = DAG.getNode(ISD::SHL, dl, getPointerTy(), IDX, Scale);
8279 SDValue res = DAG.getNode(ISD::ADD, dl, getPointerTy(), ThreadPointer, IDX);
9209 SDValue Idx = I->getOperand(1);
9210 if (!isa<ConstantSDNode>(Idx))
9226 M->second |= 1U << cast<ConstantSDNode>(Idx)->getZExtValue();
11627 unsigned Idx = 1;
11630 E = FTy->param_end(); I != E; ++I, ++Idx)
11631 if (Attrs.hasAttribute(Idx, Attribute::InReg))
15702 int Idx = (Elt > (int)NumElems) ? -1 : ShuffleMask[Elt];
15703 SDValue LdNode = (Idx < (int)NumElems) ? InVec.getOperand(0)
15825 SDValue Idx = Extract->getOperand(1);
15828 uint64_t Offset = EltSize * cast<ConstantSDNode>(Idx)->getZExtValue();
