Lines Matching defs:N0
7629 SDValue N0 = Op.getOperand(0);
7652 return DAG.getNode(Opc, dl, VT, N0, N1, N2);
7667 return DAG.getNode(X86ISD::INSERTPS, dl, VT, N0, N1, N2);
7683 SDValue N0 = Op.getOperand(0);
7695 SDValue V = Extract128BitVector(N0, IdxVal, DAG, dl);
7705 return Insert128BitVector(N0, V, IdxVal, DAG, dl);
7721 return DAG.getNode(X86ISD::PINSRW, dl, VT, N0, N1, N2);
8553 SDValue N0 = Op.getOperand(0);
8554 EVT SVT = N0.getValueType();
8564 DAG.getNode(ISD::ZERO_EXTEND, dl, NVT, N0));
8569 SDValue N0 = Op.getOperand(0);
8578 if (DAG.SignBitIsZero(N0))
8579 return DAG.getNode(ISD::SINT_TO_FP, dl, Op.getValueType(), N0);
8581 EVT SrcVT = N0.getValueType();
9159 SDValue N0 = Op.getOperand(0);
9164 SDValue xFGETSIGN = DAG.getNode(X86ISD::FGETSIGNx86, dl, VT, N0,
11957 SDValue N0 = Op.getOperand(0);
11978 SDValue SGN = getTargetVShiftNode(X86ISD::VSRAI, dl, VT, N0, Sz, DAG);
11979 // Add (N0 < 0) ? abs2 - 1 : 0;
11982 SDValue ADD = DAG.getNode(ISD::ADD, dl, VT, N0, SRL);
16701 SDValue N0 = N->getOperand(0);
16704 EVT VT = N0.getValueType();
16709 N1C && N0.getOpcode() == ISD::AND &&
16710 N0.getOperand(1).getOpcode() == ISD::Constant) {
16711 SDValue N00 = N0.getOperand(0);
16716 APInt Mask = cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue();
16730 assert(N0.getValueType().isVector() && "Invalid vector shift type");
16736 return DAG.getNode(ISD::ADD, SDLoc(N), VT, N0, N0);
16804 SDValue N0 = N->getOperand(0);
16806 SDValue CMP0 = N0->getOperand(1);
16838 enum X86::CondCode cc0 = (enum X86::CondCode)N0.getConstantOperandVal(0);
16925 SDValue N0 = Narrow->getOperand(0);
16930 if (N0.getOpcode() != ISD::TRUNCATE)
16934 EVT WideVT = N0->getOperand(0)->getValueType(0);
16950 // Set N0 and N1 to hold the inputs to the new wide operation.
16951 N0 = N0->getOperand(0);
16962 SDValue Op = DAG.getNode(Narrow->getOpcode(), DL, WideVT, N0, N1);
16997 SDValue N0 = N->getOperand(0);
17002 if (N0.getOpcode() == ISD::SUB && N0.getOperand(1) == N1 &&
17003 isZero(N0.getOperand(0)))
17007 if (N1.getOpcode() == ISD::SUB && N1.getOperand(1) == N0 &&
17009 return DAG.getNode(X86ISD::BLSI, DL, VT, N0);
17012 if (N0.getOpcode() == ISD::ADD && N0.getOperand(0) == N1 &&
17013 isAllOnes(N0.getOperand(1)))
17017 if (N1.getOpcode() == ISD::ADD && N1.getOperand(0) == N0 &&
17019 return DAG.getNode(X86ISD::BLSR, DL, VT, N0);
17031 SDValue N0 = N->getOperand(0);
17036 if (N0.getOpcode() == ISD::XOR &&
17037 //ISD::isBuildVectorAllOnes(N0.getOperand(1).getNode()))
17038 CanFoldXORWithAllOnes(N0.getOperand(1).getNode()))
17039 return DAG.getNode(X86ISD::ANDNP, DL, VT, N0.getOperand(0), N1);
17045 return DAG.getNode(X86ISD::ANDNP, DL, VT, N1.getOperand(0), N0);
17061 SDValue N0 = N->getOperand(0);
17071 if (N0.getOpcode() == X86ISD::ANDNP)
17072 std::swap(N0, N1);
17074 if (N0.getOpcode() == ISD::AND && N1.getOpcode() == X86ISD::ANDNP) {
17078 if (N0.getOperand(0) == Mask)
17079 Y = N0.getOperand(1);
17080 if (N0.getOperand(1) == Mask)
17081 Y = N0.getOperand(0);
17148 if (N0.getOpcode() == ISD::SRL && N1.getOpcode() == ISD::SHL)
17149 std::swap(N0, N1);
17150 if (N0.getOpcode() != ISD::SHL || N1.getOpcode() != ISD::SRL)
17152 if (!N0.hasOneUse() || !N1.hasOneUse())
17155 SDValue ShAmt0 = N0.getOperand(1);
17168 SDValue Op0 = N0.getOperand(0);
17194 N0.getOperand(0), N1.getOperand(0),
17211 SDValue N0 = N->getOperand(0);
17218 N0.getOpcode() == ISD::ADD &&
17219 N0.getOperand(1) == N1 &&
17221 N1.getOperand(0) == N0.getOperand(0))
17226 DAG.getConstant(0, VT), N0.getOperand(0));
17228 SDValue Ops[] = { N0.getOperand(0), Neg,
17261 SDValue N0 = N->getOperand(0);
17265 if (N0.getOpcode() == ISD::ADD && N0.getOperand(0) == N1 &&
17266 isAllOnes(N0.getOperand(1)))
17269 if (N1.getOpcode() == ISD::ADD && N1.getOperand(0) == N0 &&
17271 return DAG.getNode(X86ISD::BLSMSK, DL, VT, N0);
17962 SDValue N0 = N->getOperand(0);
17972 if (VT == MVT::v4i64 && (N0.getOpcode() == ISD::ANY_EXTEND ||
17973 N0.getOpcode() == ISD::SIGN_EXTEND)) {
17974 SDValue N00 = N0.getOperand(0);
18058 SDValue N0 = N->getOperand(0);
18061 if (N0.getOpcode() == ISD::AND &&
18062 N0.hasOneUse() &&
18063 N0.getOperand(0).hasOneUse()) {
18064 SDValue N00 = N0.getOperand(0);
18066 ConstantSDNode *C = dyn_cast<ConstantSDNode>(N0.getOperand(1));
18475 SDValue N0 = Op.getOperand(0);
18477 if (MayFoldLoad(N0) && MayFoldIntoStore(Op))
18490 SDValue N0 = Op.getOperand(0);
18495 if (MayFoldLoad(N0) && (!isa<ConstantSDNode>(N1) || MayFoldIntoStore(Op)))
18497 if (MayFoldLoad(N1) && (!isa<ConstantSDNode>(N0) || MayFoldIntoStore(Op)))
