Lines Matching defs:NewOp
6640 SDValue NewOp = Compact8x32ShuffleNode(SVOp, DAG);
6641 if (NewOp.getNode())
6642 return NewOp
7117 SDValue NewOp = LowerVectorIntExtend(Op, DAG);
7118 if (NewOp.getNode())
7119 return NewOp;
7125 SDValue NewOp = RewriteAsNarrowerShuffle(SVOp, DAG);
7126 if (NewOp.getNode())
7127 return DAG.getNode(ISD::BITCAST, dl, VT, NewOp);
7133 SDValue NewOp = RewriteAsNarrowerShuffle(SVOp, DAG);
7134 if (NewOp.getNode()) {
7135 MVT NewVT = NewOp.getValueType().getSimpleVT();
7136 if (isCommutedMOVLMask(cast<ShuffleVectorSDNode>(NewOp)->getMask(),
7138 return getVZextMovL(VT, NewVT, NewOp.getOperand(0),
7142 SDValue NewOp = RewriteAsNarrowerShuffle(SVOp, DAG);
7143 if (NewOp.getNode()) {
7144 MVT NewVT = NewOp.getValueType().getSimpleVT();
7145 if (isMOVLMask(cast<ShuffleVectorSDNode>(NewOp)->getMask(), NewVT))
7146 return getVZextMovL(VT, NewVT, NewOp.getOperand(1),
7197 SDValue NewOp = NormalizeVectorShuffle(Op, DAG);
7198 if (NewOp.getNode())
7199 return NewOp;
7440 SDValue NewOp = LowerVECTOR_SHUFFLEv8i16(Op, Subtarget, DAG);
7441 if (NewOp.getNode())
7442 return NewOp;
7446 SDValue NewOp = LowerVECTOR_SHUFFLEv16i8(SVOp, DAG, *this);
7447 if (NewOp.getNode())
7448 return NewOp;
7452 SDValue NewOp = LowerVECTOR_SHUFFLEv32i8(SVOp, Subtarget, DAG);
7453 if (NewOp.getNode())
7454 return NewOp;
12904 SelectionDAG &DAG, unsigned NewOp) {
12918 DAG.getMemIntrinsicNode(NewOp, dl, Tys, Ops, array_lengthof(Ops), MVT::i64,
15757 SDValue NewOp = XFormVExtractWithShuffleIntoLoad(N, DAG, DCI);
15758 if (NewOp.getNode())
15759 return NewOp;
17887 unsigned NewOp = 0;
17890 case X86ISD::FMIN: NewOp = X86ISD::FMINC; break;
17891 case X86ISD::FMAX: NewOp = X86ISD::FMAXC; break;
17894 return DAG.getNode(NewOp, SDLoc(N), N->getValueType(0),
