Lines Matching refs:Other
321 // 64-bit FILD followed by conditional FADD for other targets.
324 // FILD for other targets.
432 setOperationAction(ISD::BR_JT , MVT::Other, Expand);
433 setOperationAction(ISD::BRCOND , MVT::Other, Custom);
441 setOperationAction(ISD::SELECT_CC , MVT::Other, Expand);
527 setOperationAction(ISD::EH_RETURN , MVT::Other, Custom);
531 // other SjLj exception interfaces are implemented and please don't build
535 setOperationAction(ISD::EH_SJLJ_LONGJMP, MVT::Other, Custom);
564 setOperationAction(ISD::PREFETCH , MVT::Other, Legal);
566 setOperationAction(ISD::ATOMIC_FENCE , MVT::Other, Custom);
599 setOperationAction(ISD::EH_LABEL, MVT::Other, Expand);
612 setOperationAction(ISD::INIT_TRAMPOLINE, MVT::Other, Custom);
613 setOperationAction(ISD::ADJUST_TRAMPOLINE, MVT::Other, Custom);
615 setOperationAction(ISD::TRAP, MVT::Other, Legal);
616 setOperationAction(ISD::DEBUGTRAP, MVT::Other, Legal);
619 setOperationAction(ISD::VASTART , MVT::Other, Custom);
620 setOperationAction(ISD::VAEND , MVT::Other, Expand);
623 setOperationAction(ISD::VAARG , MVT::Other, Custom);
624 setOperationAction(ISD::VACOPY , MVT::Other, Custom);
627 setOperationAction(ISD::VAARG , MVT::Other, Expand);
628 setOperationAction(ISD::VACOPY , MVT::Other, Expand);
631 setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
632 setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
878 // MMX-sized vectors (other than x86mmx) are expected to be expanded
1266 // Do not attempt to custom lower other non-256-bit vectors
1408 // Do not attempt to custom lower other non-512-bit vectors
1453 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom);
1454 setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::Other, Custom);
1601 /// It returns EVT::Other if the type should be determined using generic
1887 MVT::Other, &RetOps[0], RetOps.size());
1977 MVT::Other, MVT::Glue, Ops), 1);
2255 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Copy, Chain);
2379 MVT::Other,
2384 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
2631 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
2731 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
2831 SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
3224 // Other Lowering Hooks
4101 /// In VPERMILPD the two lanes could be shuffled independently of each other
4133 /// element of vector 2 and the other elements to come from vector 1 in order.
4900 // this is why MOVSS and MOVSD are used in the first place. The other
4901 // elements come from the other positions of the first source vector
5356 SDValue NewChain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other,
5368 SDVTList Tys = DAG.getVTList(MVT::v2i64, MVT::Other);
5382 SDValue NewChain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other,
5858 // is a non-constant being inserted into an element other than the low one,
6044 // to create 256-bit vectors from two other 128-bit ones.
6065 // from two other 128-bit ones.
6363 // The other elements are put in the right place using pextrw and pinsrw.
6734 // If only one input was used, use an undefined vector for the other.
6806 // one element from the other, call it Y. First, use a shufps to build an
6810 // containing the element from Y from the intermediate, and the other half
7187 // so the shuffle can be broken into other shuffles and the legalizer can
7434 // lower it into other known shuffles. FIXME: this isn't true yet, but
8015 SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
8214 SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
8382 Tys = DAG.getVTList(MVT::f64, MVT::Other, MVT::Glue);
8384 Tys = DAG.getVTList(Op.getValueType(), MVT::Other);
8417 Tys = DAG.getVTList(MVT::Other);
8621 SDVTList Tys = DAG.getVTList(MVT::f80, MVT::Other);
8709 SDVTList Tys = DAG.getVTList(Op.getOperand(0).getValueType(), MVT::Other);
8731 SDValue FIST = DAG.getMemIntrinsicNode(Opc, DL, DAG.getVTList(MVT::Other),
8737 DAG.getVTList(MVT::Other, MVT::Glue),
9186 EVT VT = MVT::Other;
9326 // uses of other nodes in the match, such as the ADD in this case. This
9704 // Handle all other FP comparisons here.
10200 // ISD::OR of two X86ISD::SETCC nodes each of which has no other use apart
10540 SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
10612 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other,
10665 SDVTList VTs = DAG.getVTList(getPointerTy(), MVT::Other);
11407 SDVTList VTs = DAG.getVTList(Op->getValueType(0), MVT::Glue, MVT::Other);
11427 SDVTList VTs = DAG.getVTList(Op->getValueType(0), MVT::Other);
11516 return DAG.getNode(X86ISD::EH_RETURN, dl, MVT::Other, Chain,
11524 DAG.getVTList(MVT::i32, MVT::Other),
11531 return DAG.getNode(X86ISD::EH_SJLJ_LONGJMP, DL, MVT::Other,
11605 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains, 6);
11685 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains, 4);
11699 FLT_ROUNDS, on the other hand, expects the following:
11727 DAG.getVTList(MVT::Other),
12586 return DAG.getNode(X86ISD::MFENCE, dl, MVT::Other, Op.getOperand(0));
12599 SDNode *Res = DAG.getMachineNode(X86::OR32mrLocked, dl, MVT::Other, Ops);
12604 return DAG.getNode(X86ISD::MEMBARRIER, dl, MVT::Other, Op.getOperand(0));
12630 SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Glue);
12642 SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Glue);
12674 // All other conversions need to be expanded.
12715 // Other atomic stores have a simple pattern.
12916 SDVTList Tys = DAG.getVTList(MVT::i32, MVT::i32, MVT::Other);
12989 SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Glue);
13033 SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Glue);
13312 default: // Other stuff never works.
14279 // Address into RAX/EAX, other two args into ECX, EDX.
15563 SDVTList Tys = DAG.getVTList(MVT::v4i64, MVT::Other);
15578 SDValue NewChain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
15676 // Don't duplicate a load with other uses.
15689 // Don't duplicate a load with other uses.
15710 // Don't duplicate a load with other uses.
16208 SDValue Other;
16210 Other = RHS;
16213 Other = LHS;
16216 if (Other.getNode() && Other->getNumOperands() == 2 &&
16217 DAG.isEqualTo(Other->getOperand(0), Cond.getOperand(0))) {
16218 SDValue OpLHS = Other->getOperand(0), OpRHS = Other->getOperand(1);
16225 Other->getOpcode() == ISD::SUB && DAG.isEqualTo(OpRHS, CondRHS))
16230 if (CC == ISD::SETUGT && Other->getOpcode() == ISD::ADD &&
16243 if (CC == ISD::SETLT && Other->getOpcode() == ISD::XOR &&
16356 // Check CMP operands. One of them should be 0 or 1 and the other should be
17311 SDValue TF = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
17412 SDValue TF = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &Chains[0],
17508 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Ch0, Ch1);
17588 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &Chains[0],
17655 NewChain = DAG.getNode(ISD::TokenFactor, LdDL, MVT::Other, &Ops[0],
17683 NewChain = DAG.getNode(ISD::TokenFactor, LdDL, MVT::Other, &Ops[0],
17700 return DAG.getNode(ISD::TokenFactor, StDL, MVT::Other, LoSt, HiSt);
18561 // No need to check constraints, nothing other than the equivalent of
