Lines Matching refs:RAX
603 setExceptionPointerRegister(X86::RAX);
1836 // which is returned in RAX / RDX.
1857 // the sret argument into %rax/%eax (depending on ABI) for the return.
1860 // so now we copy the value out and into %rax/%eax.
1872 X86::RAX : X86::EAX;
1876 // RAX/EAX now acts like a return value.
2241 // the sret argument into %rax/%eax (depending on ABI) for the return.
8059 X86::RAX, X86II::MO_TLSGD);
8075 Base = GetTLSADDR(DAG, DAG.getEntryNode(), GA, NULL, PtrVT, X86::RAX,
8224 unsigned Reg = Subtarget->is64Bit() ? X86::RAX : X86::EAX;
8237 // [rax+rcx] contains the address
8442 movq %rax, %xmm0
10536 unsigned Reg = (Subtarget->is64Bit() ? X86::RAX : X86::EAX);
12620 Reg = X86::RAX; size = 8;
12646 SDValue rax = DAG.getCopyFromReg(rd, dl, X86::RAX, MVT::i64, rd.getValue(1));
12647 SDValue rdx = DAG.getCopyFromReg(rax.getValue(1), dl, X86::RDX, MVT::i64,
12648 rax.getValue(2));
12652 DAG.getNode(ISD::OR, dl, MVT::i64, rax, Tmp),
13014 Regs64bit ? X86::RAX : X86::EAX,
13040 Regs64bit ? X86::RAX : X86::EAX,
14279 // Address into RAX/EAX, other two args into ECX, EDX.
14281 unsigned MemReg = Subtarget->is64Bit() ? X86::RAX : X86::EAX;
14815 .addReg(X86::RAX, RegState::ImplicitDefine);
14831 .addReg(Is64Bit ? X86::RAX : X86::EAX);
14867 // Clobbers R10, R11, RAX and EFLAGS.
14871 .addReg(X86::RAX, RegState::Implicit)
14873 .addReg(X86::RAX, RegState::Define | RegState::Implicit)
14881 .addReg(X86::RAX, RegState::Implicit)
14883 // RAX has the offset to be subtracted from RSP.
14886 .addReg(X86::RAX);
14935 MIB.addReg(X86::RAX, RegState::ImplicitDefine).addRegMask(RegMask);
19111 case X86::AX: DestReg = X86::RAX; break;
