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Lines Matching full:getsubtarget

94   : X86GenInstrInfo((tm.getSubtarget<X86Subtarget>().is64Bit()
97 (tm.getSubtarget<X86Subtarget>().is64Bit()
1381 if (!TM.getSubtarget<X86Subtarget>().is64Bit())
1855 if (TM.getSubtarget<X86Subtarget>().is64Bit()) {
1911 if (TM.getSubtarget<X86Subtarget>().is64Bit())
1981 bool is64Bit = TM.getSubtarget<X86Subtarget>().is64Bit();
1987 if (!TM.getSubtarget<X86Subtarget>().hasSSE2()) return 0;
1999 if (!TM.getSubtarget<X86Subtarget>().hasSSE2()) return 0;
2842 if (!TM.getSubtarget<X86Subtarget>().hasCMov())
2934 bool HasAVX = TM.getSubtarget<X86Subtarget>().hasAVX();
2946 TM.getSubtarget<X86Subtarget>().is64Bit()) {
3008 bool HasAVX = TM.getSubtarget<X86Subtarget>().hasAVX();
3014 if (TM.getSubtarget<X86Subtarget>().is64Bit())
3707 bool HasAVX = TM.getSubtarget<X86Subtarget>().hasAVX();
3809 bool isCallRegIndirect = TM.getSubtarget<X86Subtarget>().callRegIndirect();
3995 bool HasAVX = TM.getSubtarget<X86Subtarget>().hasAVX();
4129 if (TM.getSubtarget<X86Subtarget>().is64Bit())
4269 !TM.getSubtarget<X86Subtarget>().isUnalignedMemAccessFast())
4417 !TM.getSubtarget<X86Subtarget>().isUnalignedMemAccessFast())
4460 !TM.getSubtarget<X86Subtarget>().isUnalignedMemAccessFast())
4655 if (!TM.getSubtarget<X86Subtarget>().hasAVX())
4837 assert(!TM.getSubtarget<X86Subtarget>().is64Bit() &&
4934 bool hasAVX2 = TM.getSubtarget<X86Subtarget>().hasAVX2();
4949 assert((TM.getSubtarget<X86Subtarget>().hasAVX2() || Domain < 3) &&
5027 assert(!TM->getSubtarget<X86Subtarget>().is64Bit() &&
5049 if (TM->getSubtarget<X86Subtarget>().isPICStyleGOT())
5060 if (TM->getSubtarget<X86Subtarget>().isPICStyleGOT()) {
5143 const bool is64Bit = TM->getSubtarget<X86Subtarget>().is64Bit();
5164 const bool is64Bit = TM->getSubtarget<X86Subtarget>().is64Bit();