Lines Matching refs:X86InstrInfo
1 //===-- X86InstrInfo.cpp - X86 Instruction Information --------------------===//
14 #include "X86InstrInfo.h"
93 X86InstrInfo::X86InstrInfo(X86TargetMachine &tm)
1356 X86InstrInfo::AddTableEntry(RegOp2MemOpTableType &R2MTable,
1371 X86InstrInfo::isCoalescableExtInstr(const MachineInstr &MI,
1420 bool X86InstrInfo::isFrameOperand(const MachineInstr *MI, unsigned int Op,
1490 unsigned X86InstrInfo::isLoadFromStackSlot(const MachineInstr *MI,
1498 unsigned X86InstrInfo::isLoadFromStackSlotPostFE(const MachineInstr *MI,
1511 unsigned X86InstrInfo::isStoreToStackSlot(const MachineInstr *MI,
1520 unsigned X86InstrInfo::isStoreToStackSlotPostFE(const MachineInstr *MI,
1552 X86InstrInfo::isReallyTriviallyReMaterializable(const MachineInstr *MI,
1711 void X86InstrInfo::reMaterialize(MachineBasicBlock &MBB,
1766 bool X86InstrInfo::classifyLEAReg(MachineInstr *MI, const MachineOperand &Src,
1842 X86InstrInfo::convertToThreeAddressWithLEA(unsigned MIOpc,
1960 X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
2261 X86InstrInfo::commuteInstruction(MachineInstr *MI, bool NewMI) const {
2612 bool X86InstrInfo::isUnpredicatedTerminator(const MachineInstr *MI) const {
2623 bool X86InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
2767 unsigned X86InstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
2788 X86InstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
2836 bool X86InstrInfo::
2873 void X86InstrInfo::insertSelect(MachineBasicBlock &MBB,
2929 void X86InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
3085 void X86InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
3102 void X86InstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
3123 void X86InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
3137 void X86InstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
3155 bool X86InstrInfo::
3361 bool X86InstrInfo::
3613 MachineInstr* X86InstrInfo::
3706 bool X86InstrInfo::expandPostRAPseudo(MachineBasicBlock::iterator MI) const {
3804 X86InstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
3965 unsigned X86InstrInfo::
3988 void X86InstrInfo::
4011 MachineInstr* X86InstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
4053 MachineInstr* X86InstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
4192 bool X86InstrInfo::canFoldMemoryOperand(const MachineInstr *MI,
4247 bool X86InstrInfo::unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI,
4373 X86InstrInfo::unfoldMemoryOperand(SelectionDAG &DAG, SDNode *N,
4478 unsigned X86InstrInfo::getOpcodeAfterMemoryUnfold(unsigned Opc,
4497 X86InstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2,
4602 bool X86InstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2,
4650 bool X86InstrInfo::shouldScheduleAdjacent(MachineInstr* First,
4812 bool X86InstrInfo::
4822 bool X86InstrInfo::
4836 unsigned X86InstrInfo::getGlobalBaseReg(MachineFunction *MF) const {
4932 X86InstrInfo::getExecutionDomain(const MachineInstr *MI) const {
4943 void X86InstrInfo::setExecutionDomain(MachineInstr *MI, unsigned Domain) const {
4958 void X86InstrInfo::getNoopForMachoTarget(MCInst &NopInst) const {
4962 bool X86InstrInfo::isHighLatencyDef(int opc) const {
5008 bool X86InstrInfo::
5046 const X86InstrInfo *TII = TM->getInstrInfo();
5144 const X86InstrInfo *TII = TM->getInstrInfo();
5165 const X86InstrInfo *TII = TM->getInstrInfo();
