Lines Matching full:registerclass
318 def GR8 : RegisterClass<"X86", [i8], 8,
327 def GR16 : RegisterClass<"X86", [i16], 16,
331 def GR32 : RegisterClass<"X86", [i32], 32,
338 def GR64 : RegisterClass<"X86", [i64], 64,
345 def SEGMENT_REG : RegisterClass<"X86", [i16], 16, (add CS, DS, SS, ES, FS, GS)>;
348 def DEBUG_REG : RegisterClass<"X86", [i32], 32, (sequence "DR%u", 0, 7)>;
351 def CONTROL_REG : RegisterClass<"X86", [i64], 64, (sequence "CR%u", 0, 15)>;
359 def GR8_ABCD_L : RegisterClass<"X86", [i8], 8, (add AL, CL, DL, BL)>;
360 def GR8_ABCD_H : RegisterClass<"X86", [i8], 8, (add AH, CH, DH, BH)>;
361 def GR16_ABCD : RegisterClass<"X86", [i16], 16, (add AX, CX, DX, BX)>;
362 def GR32_ABCD : RegisterClass<"X86", [i32], 32, (add EAX, ECX, EDX, EBX)>;
363 def GR64_ABCD : RegisterClass<"X86", [i64], 64, (add RAX, RCX, RDX, RBX)>;
364 def GR32_TC : RegisterClass<"X86", [i32], 32, (add EAX, ECX, EDX)>;
365 def GR64_TC : RegisterClass<"X86", [i64], 64, (add RAX, RCX, RDX, RSI, RDI,
367 def GR64_TCW64 : RegisterClass<"X86", [i64], 64, (add RAX, RCX, RDX,
371 def GR8_NOREX : RegisterClass<"X86", [i8], 8,
379 def GR16_NOREX : RegisterClass<"X86", [i16], 16,
382 def GR32_NOREX : RegisterClass<"X86", [i32], 32,
385 def GR64_NOREX : RegisterClass<"X86", [i64], 64,
391 def GR32_NOAX : RegisterClass<"X86", [i32], 32, (sub GR32, EAX)>;
394 def GR32_NOSP : RegisterClass<"X86", [i32], 32, (sub GR32, ESP)>;
397 def GR64_NOSP : RegisterClass<"X86", [i64], 64, (sub GR64, RSP, RIP)>;
401 def GR32_NOREX_NOSP : RegisterClass<"X86", [i32], 32,
405 def GR64_NOREX_NOSP : RegisterClass<"X86", [i64], 64,
409 def GR32_AD : RegisterClass<"X86", [i32], 32, (add EAX, EDX)>;
412 def FR32 : RegisterClass<"X86", [f32], 32, (sequence "XMM%u", 0, 15)>;
414 def FR64 : RegisterClass<"X86", [f64], 64, (add FR32)>;
423 def RFP32 : RegisterClass<"X86",[f32], 32, (sequence "FP%u", 0, 6)>;
424 def RFP64 : RegisterClass<"X86",[f64], 32, (add RFP32)>;
425 def RFP80 : RegisterClass<"X86",[f80], 32, (add RFP32)>;
430 def RST : RegisterClass<"X86", [f80, f64, f32], 32, (sequence "ST%u", 0, 7)> {
435 def VR64: RegisterClass<"X86", [x86mmx], 64, (sequence "MM%u", 0, 7)>;
436 def VR128 : RegisterClass<"X86", [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
438 def VR256 : RegisterClass<"X86", [v32i8, v16i16, v8i32, v4i64, v8f32, v4f64],
442 def CCR : RegisterClass<"X86", [i32], 32, (add EFLAGS)> {
446 def FPCCR : RegisterClass<"X86", [i16], 16, (add FPSW)> {
452 def VR512 : RegisterClass<"X86", [v16f32, v8f64, v16i32, v8i64], 512,
456 def FR32X : RegisterClass<"X86", [f32], 32, (sequence "XMM%u", 0, 31)>;
458 def FR64X : RegisterClass<"X86", [f64], 64, (add FR32X)>;
461 def VR128X : RegisterClass<"X86", [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
463 def VR256X : RegisterClass<"X86", [v32i8, v16i16, v8i32, v4i64, v8f32, v4f64],
466 def VK8 : RegisterClass<"X86", [v8i1], 8, (sequence "K%u", 0, 7)>;
467 def VK16 : RegisterClass<"X86", [v16i1], 16, (add VK8)>;
469 def VK8WM : RegisterClass<"X86", [v8i1], 8, (sub VK8, K0)>;
470 def VK16WM : RegisterClass<"X86", [v16i1], 16, (add VK8WM)>;
