Lines Matching full:nounwind
3 define <8 x i8> @vshrns8(<8 x i16>* %A) nounwind {
11 define <4 x i16> @vshrns16(<4 x i32>* %A) nounwind {
19 define <2 x i32> @vshrns32(<2 x i64>* %A) nounwind {
27 declare <8 x i8> @llvm.arm.neon.vshiftn.v8i8(<8 x i16>, <8 x i16>) nounwind readnone
28 declare <4 x i16> @llvm.arm.neon.vshiftn.v4i16(<4 x i32>, <4 x i32>) nounwind readnone
29 declare <2 x i32> @llvm.arm.neon.vshiftn.v2i32(<2 x i64>, <2 x i64>) nounwind readnone
31 define <8 x i8> @vrshrns8(<8 x i16>* %A) nounwind {
39 define <4 x i16> @vrshrns16(<4 x i32>* %A) nounwind {
47 define <2 x i32> @vrshrns32(<2 x i64>* %A) nounwind {
55 declare <8 x i8> @llvm.arm.neon.vrshiftn.v8i8(<8 x i16>, <8 x i16>) nounwind readnone
56 declare <4 x i16> @llvm.arm.neon.vrshiftn.v4i16(<4 x i32>, <4 x i32>) nounwind readnone
57 declare <2 x i32> @llvm.arm.neon.vrshiftn.v2i32(<2 x i64>, <2 x i64>) nounwind readnone
