Lines Matching full:msr
3001 # CHECK: msr spsel, #0
3002 # CHECK: msr daifset, #15
3003 # CHECK: msr daifclr, #12
3042 # CHECK: msr teecr32_el1, x12
3043 # CHECK: msr osdtrrx_el1, x12
3044 # CHECK: msr mdccint_el1, x12
3045 # CHECK: msr mdscr_el1, x12
3046 # CHECK: msr osdtrtx_el1, x12
3047 # CHECK: msr dbgdtr_el0, x12
3048 # CHECK: msr dbgdtrtx_el0, x12
3049 # CHECK: msr oseccr_el1, x12
3050 # CHECK: msr dbgvcr32_el2, x12
3051 # CHECK: msr dbgbvr0_el1, x12
3052 # CHECK: msr dbgbvr1_el1, x12
3053 # CHECK: msr dbgbvr2_el1, x12
3054 # CHECK: msr dbgbvr3_el1, x12
3055 # CHECK: msr dbgbvr4_el1, x12
3056 # CHECK: msr dbgbvr5_el1, x12
3057 # CHECK: msr dbgbvr6_el1, x12
3058 # CHECK: msr dbgbvr7_el1, x12
3059 # CHECK: msr dbgbvr8_el1, x12
3060 # CHECK: msr dbgbvr9_el1, x12
3061 # CHECK: msr dbgbvr10_el1, x12
3062 # CHECK: msr dbgbvr11_el1, x12
3063 # CHECK: msr dbgbvr12_el1, x12
3064 # CHECK: msr dbgbvr13_el1, x12
3065 # CHECK: msr dbgbvr14_el1, x12
3066 # CHECK: msr dbgbvr15_el1, x12
3067 # CHECK: msr dbgbcr0_el1, x12
3068 # CHECK: msr dbgbcr1_el1, x12
3069 # CHECK: msr dbgbcr2_el1, x12
3070 # CHECK: msr dbgbcr3_el1, x12
3071 # CHECK: msr dbgbcr4_el1, x12
3072 # CHECK: msr dbgbcr5_el1, x12
3073 # CHECK: msr dbgbcr6_el1, x12
3074 # CHECK: msr dbgbcr7_el1, x12
3075 # CHECK: msr dbgbcr8_el1, x12
3076 # CHECK: msr dbgbcr9_el1, x12
3077 # CHECK: msr dbgbcr10_el1, x12
3078 # CHECK: msr dbgbcr11_el1, x12
3079 # CHECK: msr dbgbcr12_el1, x12
3080 # CHECK: msr dbgbcr13_el1, x12
3081 # CHECK: msr dbgbcr14_el1, x12
3082 # CHECK: msr dbgbcr15_el1, x12
3083 # CHECK: msr dbgwvr0_el1, x12
3084 # CHECK: msr dbgwvr1_el1, x12
3085 # CHECK: msr dbgwvr2_el1, x12
3086 # CHECK: msr dbgwvr3_el1, x12
3087 # CHECK: msr dbgwvr4_el1, x12
3088 # CHECK: msr dbgwvr5_el1, x12
3089 # CHECK: msr dbgwvr6_el1, x12
3090 # CHECK: msr dbgwvr7_el1, x12
3091 # CHECK: msr dbgwvr8_el1, x12
3092 # CHECK: msr dbgwvr9_el1, x12
3093 # CHECK: msr dbgwvr10_el1, x12
3094 # CHECK: msr dbgwvr11_el1, x12
3095 # CHECK: msr dbgwvr12_el1, x12
3096 # CHECK: msr dbgwvr13_el1, x12
3097 # CHECK: msr dbgwvr14_el1, x12
3098 # CHECK: msr dbgwvr15_el1, x12
3099 # CHECK: msr dbgwcr0_el1, x12
3100 # CHECK: msr dbgwcr1_el1, x12
3101 # CHECK: msr dbgwcr2_el1, x12
3102 # CHECK: msr dbgwcr3_el1, x12
3103 # CHECK: msr dbgwcr4_el1, x12
3104 # CHECK: msr dbgwcr5_el1, x12
3105 # CHECK: msr dbgwcr6_el1, x12
3106 # CHECK: msr dbgwcr7_el1, x12
3107 # CHECK: msr dbgwcr8_el1, x12
3108 # CHECK: msr dbgwcr9_el1, x12
3109 # CHECK: msr dbgwcr10_el1, x12
3110 # CHECK: msr dbgwcr11_el1, x12
3111 # CHECK: msr dbgwcr12_el1, x12
3112 # CHECK: msr dbgwcr13_el1, x12
3113 # CHECK: msr dbgwcr14_el1, x12
3114 # CHECK: msr dbgwcr15_el1, x12
3115 # CHECK: msr teehbr32_el1, x12
3116 # CHECK: msr oslar_el1, x12
3117 # CHECK: msr osdlr_el1, x12
3118 # CHECK: msr dbgprcr_el1, x12
3119 # CHECK: msr dbgclaimset_el1, x12
3120 # CHECK: msr dbgclaimclr_el1, x12
3121 # CHECK: msr csselr_el1, x12
3122 # CHECK: msr vpidr_el2, x12
3123 # CHECK: msr vmpidr_el2, x12
3124 # CHECK: msr sctlr_el1, x12
3125 # CHECK: msr sctlr_el2, x12
3126 # CHECK: msr sctlr_el3, x12
3127 # CHECK: msr actlr_el1, x12
3128 # CHECK: msr actlr_el2, x12
3129 # CHECK: msr actlr_el3, x12
3130 # CHECK: msr cpacr_el1, x12
3131 # CHECK: msr hcr_el2, x12
3132 # CHECK: msr scr_el3, x12
3133 # CHECK: msr mdcr_el2, x12
3134 # CHECK: msr sder32_el3, x12
3135 # CHECK: msr cptr_el2, x12
3136 # CHECK: msr cptr_el3, x12
3137 # CHECK: msr hstr_el2, x12
3138 # CHECK: msr hacr_el2, x12
3139 # CHECK: msr mdcr_el3, x12
3140 # CHECK: msr ttbr0_el1, x12
3141 # CHECK: msr ttbr0_el2, x12
3142 # CHECK: msr ttbr0_el3, x12
3143 # CHECK: msr ttbr1_el1, x12
3144 # CHECK: msr tcr_el1, x12
3145 # CHECK: msr tcr_el2, x12
3146 # CHECK: msr tcr_el3, x12
3147 # CHECK: msr vttbr_el2, x12
3148 # CHECK: msr vtcr_el2, x12
3149 # CHECK: msr dacr32_el2, x12
3150 # CHECK: msr spsr_el1, x12
3151 # CHECK: msr spsr_el2, x12
3152 # CHECK: msr spsr_el3, x12
3153 # CHECK: msr elr_el1, x12
3154 # CHECK: msr elr_el2, x12
3155 # CHECK: msr elr_el3, x12
3156 # CHECK: msr sp_el0, x12
3157 # CHECK: msr sp_el1, x12
3158 # CHECK: msr sp_el2, x12
3159 # CHECK: msr spsel, x12
3160 # CHECK: msr nzcv, x12
3161 # CHECK: msr daif, x12
3162 # CHECK: msr currentel, x12
3163 # CHECK: msr spsr_irq, x12
3164 # CHECK: msr spsr_abt, x12
3165 # CHECK: msr spsr_und, x12
3166 # CHECK: msr spsr_fiq, x12
3167 # CHECK: msr fpcr, x12
3168 # CHECK: msr fpsr, x12
3169 # CHECK: msr dspsr_el0, x12
3170 # CHECK: msr dlr_el0, x12
3171 # CHECK: msr ifsr32_el2, x12
3172 # CHECK: msr afsr0_el1, x12
3173 # CHECK: msr afsr0_el2, x12
3174 # CHECK: msr afsr0_el3, x12
3175 # CHECK: msr afsr1_el1, x12
3176 # CHECK: msr afsr1_el2, x12
3177 # CHECK: msr afsr1_el3, x12
3178 # CHECK: msr esr_el1, x12
3179 # CHECK: msr esr_el2, x12
3180 # CHECK: msr esr_el3, x12
3181 # CHECK: msr fpexc32_el2, x12
3182 # CHECK: msr far_el1, x12
3183 # CHECK: msr far_el2, x12
3184 # CHECK: msr far_el3, x12
3185 # CHECK: msr hpfar_el2, x12
3186 # CHECK: msr par_el1, x12
3187 # CHECK: msr pmcr_el0, x12
3188 # CHECK: msr pmcntenset_el0, x12
3189 # CHECK: msr pmcntenclr_el0, x12
3190 # CHECK: msr pmovsclr_el0, x12
3191 # CHECK: msr pmselr_el0, x12
3192 # CHECK: msr pmccntr_el0, x12
3193 # CHECK: msr pmxevtyper_el0, x12
3194 # CHECK: msr pmxevcntr_el0, x12
3195 msr pmuserenr_el0, x12
3196 # CHECK: msr pmintenset_el1, x12
3197 # CHECK: msr pmintenclr_el1, x12
3198 # CHECK: msr pmovsset_el0, x12
3199 # CHECK: msr mair_el1, x12
3200 # CHECK: msr mair_el2, x12
3201 # CHECK: msr mair_el3, x12
3202 # CHECK: msr amair_el1, x12
3203 # CHECK: msr amair_el2, x12
3204 # CHECK: msr amair_el3, x12
3205 # CHECK: msr vbar_el1, x12
3206 # CHECK: msr vbar_el2, x12
3207 # CHECK: msr vbar_el3, x12
3208 # CHECK: msr rmr_el1, x12
3209 # CHECK: msr rmr_el2, x12
3210 # CHECK: msr rmr_el3, x12
3211 # CHECK: msr tpidr_el0, x12
3212 # CHECK: msr tpidr_el2, x12
3213 # CHECK: msr tpidr_el3, x12
3214 # CHECK: msr tpidrro_el0, x12
3215 # CHECK: msr tpidr_el1, x12
3216 # CHECK: msr cntfrq_el0, x12
3217 # CHECK: msr cntvoff_el2, x12
3218 # CHECK: msr cntkctl_el1, x12
3219 # CHECK: msr cnthctl_el2, x12
3220 # CHECK: msr cntp_tval_el0, x12
3221 # CHECK: msr cnthp_tval_el2, x12
3222 # CHECK: msr cntps_tval_el1, x12
3223 # CHECK: msr cntp_ctl_el0, x12
3224 # CHECK: msr cnthp_ctl_el2, x12
3225 # CHECK: msr cntps_ctl_el1, x12
3226 # CHECK: msr cntp_cval_el0, x12
3227 # CHECK: msr cnthp_cval_el2, x12
3228 # CHECK: msr cntps_cval_el1, x12
3229 # CHECK: msr cntv_tval_el0, x12
3230 # CHECK: msr cntv_ctl_el0, x12
3231 # CHECK: msr cntv_cval_el0, x12
3232 # CHECK: msr pmevcntr0_el0, x12
3233 # CHECK: msr pmevcntr1_el0, x12
3234 # CHECK: msr pmevcntr2_el0, x12
3235 # CHECK: msr pmevcntr3_el0, x12
3236 # CHECK: msr pmevcntr4_el0, x12
3237 # CHECK: msr pmevcntr5_el0, x12
3238 # CHECK: msr pmevcntr6_el0, x12
3239 # CHECK: msr pmevcntr7_el0, x12
3240 # CHECK: msr pmevcntr8_el0, x12
3241 # CHECK: msr pmevcntr9_el0, x12
3242 # CHECK: msr pmevcntr10_el0, x12
3243 # CHECK: msr pmevcntr11_el0, x12
3244 # CHECK: msr pmevcntr12_el0, x12
3245 # CHECK: msr pmevcntr13_el0, x12
3246 # CHECK: msr pmevcntr14_el0, x12
3247 # CHECK: msr pmevcntr15_el0, x12
3248 # CHECK: msr pmevcntr16_el0, x12
3249 # CHECK: msr pmevcntr17_el0, x12
3250 # CHECK: msr pmevcntr18_el0, x12
3251 # CHECK: msr pmevcntr19_el0, x12
3252 # CHECK: msr pmevcntr20_el0, x12
3253 # CHECK: msr pmevcntr21_el0, x12
3254 # CHECK: msr pmevcntr22_el0, x12
3255 # CHECK: msr pmevcntr23_el0, x12
3256 # CHECK: msr pmevcntr24_el0, x12
3257 # CHECK: msr pmevcntr25_el0, x12
3258 # CHECK: msr pmevcntr26_el0, x12
3259 # CHECK: msr pmevcntr27_el0, x12
3260 # CHECK: msr pmevcntr28_el0, x12
3261 # CHECK: msr pmevcntr29_el0, x12
3262 # CHECK: msr pmevcntr30_el0, x12
3263 # CHECK: msr pmccfiltr_el0, x12
3264 # CHECK: msr pmevtyper0_el0, x12
3265 # CHECK: msr pmevtyper1_el0, x12
3266 # CHECK: msr pmevtyper2_el0, x12
3267 # CHECK: msr pmevtyper3_el0, x12
3268 # CHECK: msr pmevtyper4_el0, x12
3269 # CHECK: msr pmevtyper5_el0, x12
3270 # CHECK: msr pmevtyper6_el0, x12
3271 # CHECK: msr pmevtyper7_el0, x12
3272 # CHECK: msr pmevtyper8_el0, x12
3273 # CHECK: msr pmevtyper9_el0, x12
3274 # CHECK: msr pmevtyper10_el0, x12
3275 # CHECK: msr pmevtyper11_el0, x12
3276 # CHECK: msr pmevtyper12_el0, x12
3277 # CHECK: msr pmevtyper13_el0, x12
3278 # CHECK: msr pmevtyper14_el0, x12
3279 # CHECK: msr pmevtyper15_el0, x12
3280 # CHECK: msr pmevtyper16_el0, x12
3281 # CHECK: msr pmevtyper17_el0, x12
3282 # CHECK: msr pmevtyper18_el0, x12
3283 # CHECK: msr pmevtyper19_el0, x12
3284 # CHECK: msr pmevtyper20_el0, x12
3285 # CHECK: msr pmevtyper21_el0, x12
3286 # CHECK: msr pmevtyper22_el0, x12
3287 # CHECK: msr pmevtyper23_el0, x12
3288 # CHECK: msr pmevtyper24_el0, x12
3289 # CHECK: msr pmevtyper25_el0, x12
3290 # CHECK: msr pmevtyper26_el0, x12
3291 # CHECK: msr pmevtyper27_el0, x12
3292 # CHECK: msr pmevtyper28_el0, x12
3293 # CHECK: msr pmevtyper29_el0, x12
3294 # CHECK: msr pmevtyper30_el0, x12
4152 # CHECK: msr s3_0_c15_c0_0, x12
4153 # CHECK: msr s3_7_c11_c13_7, x5
