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Lines Matching refs:RegClassUnitSets

1491   assert(RegClassUnitSets.empty() && "this invalidates RegClassUnitSets");
1647   RegClassUnitSets.resize(NumRegClasses);
1670         RegClassUnitSets[RCIdx].push_back(USIdx);
1674     assert(!RegClassUnitSets[RCIdx].empty() && "missing unit set for regclass");
1679   // register class. If not, we create a new entry in RegClassUnitSets as a
1692     for (unsigned e = RegClassUnitSets.size();
1694       if (RegClassUnitSets[RCUnitSetsIdx] == RUSets) {
1699     if (RCUnitSetsIdx == RegClassUnitSets.size()) {
1701       RegClassUnitSets.resize(RCUnitSetsIdx + 1);
1702       RegClassUnitSets[RCUnitSetsIdx].swap(RUSets);