Lines Matching refs:RegClasses
855 ArrayRef<CodeGenRegisterClass*> RegClasses = RegBank.getRegClasses();
858 for (unsigned rci = RegClasses.size(); rci; --rci) {
859 CodeGenRegisterClass &RC = *RegClasses[rci - 1];
860 RC.SubClasses.resize(RegClasses.size());
864 for (unsigned s = rci; s != RegClasses.size(); ++s) {
867 CodeGenRegisterClass *SubRC = RegClasses[s];
876 for (unsigned s = rci - 1; s && testSubClass(&RC, RegClasses[s - 1]); --s)
881 for (unsigned rci = 0; rci != RegClasses.size(); ++rci) {
882 const BitVector &SC = RegClasses[rci]->getSubClasses();
886 RegClasses[s]->SuperClasses.push_back(RegClasses[rci]);
893 for (unsigned rci = 0; rci != RegClasses.size(); ++rci)
894 if (!RegClasses[rci]->getDef())
895 RegClasses[rci]->inheritProperties(RegBank);
1001 RegClasses.reserve(RCs.size());
1009 array_pod_sort(RegClasses.begin(), RegClasses.end(), TopoOrderRC);
1010 for (unsigned i = 0, e = RegClasses.size(); i != e; ++i)
1011 RegClasses[i]->EnumValue = i;
1043 RegClasses.push_back(RC);
1538 const ArrayRef<CodeGenRegisterClass*> &RegClasses = getRegClasses();
1539 unsigned NumRegClasses = RegClasses.size();
1541 if (!RegClasses[RCIdx]->Allocatable)
1546 RegUnitSets.back().Name = RegClasses[RCIdx]->getName();
1549 RegClasses[RCIdx]->buildRegUnitSet(RegUnitSets.back().Units);
1649 if (!RegClasses[RCIdx]->Allocatable)
1654 RegClasses[RCIdx]->buildRegUnitSet(RCRegUnits);
1656 // Don't increase pressure for unallocatable regclasses.
1660 DEBUG(dbgs() << "RC " << RegClasses[RCIdx]->getName() << " Units: \n";
1752 for (unsigned rci = 0, rce = RegClasses.size(); rci != rce; ++rci) {
1754 CodeGenRegisterClass *RC2 = RegClasses[rci];
1861 for (unsigned rci = FirstSubRegRC, rce = RegClasses.size(); rci != rce;
1863 CodeGenRegisterClass *SubRC = RegClasses[rci];
1896 unsigned FirstNewRC = RegClasses.size();
1899 for (unsigned rci = 0; rci != RegClasses.size(); ++rci) {
1900 CodeGenRegisterClass *RC = RegClasses[rci];
1918 unsigned NextNewRC = RegClasses.size();
1920 inferMatchingSuperRegClass(RegClasses[rci2], FirstNewRC);
