Lines Matching full:ctx
37 struct radeon_llvm_context * ctx,
50 ctx->soa.bld_base.base.gallivm, chan);
51 ctx->system_values[index] = build_intrinsic(
52 ctx->soa.bld_base.base.gallivm->builder,
54 ctx->soa.bld_base.base.elem_type, ®, 1,
64 struct radeon_llvm_context * ctx = radeon_llvm_context(bld_base);
65 LLVMValueRef cval = ctx->system_values[reg->Register.Index];
70 struct radeon_llvm_context * ctx,
82 ctx->soa.bld_base.base.gallivm,
83 soa_index + (ctx->reserved_reg_count * 4));
84 ctx->inputs[soa_index] = build_intrinsic(
85 ctx->soa.bld_base.base.gallivm->builder,
87 ctx->soa.bld_base.base.elem_type, ®, 1,
94 struct radeon_llvm_context * ctx = radeon_llvm_context(bld_base);
99 for (i = 0; i < ctx->reserved_reg_count; i++) {
115 struct radeon_llvm_context * ctx = radeon_llvm_context(bld_base);
120 for (i = 0; i < ctx->output_reg_count; i++) {
125 ctx->reserved_reg_count;
131 ctx->soa.outputs[i][chan], "");
213 struct radeon_llvm_context * ctx,
217 struct lp_build_tgsi_context * bld_base = &ctx->soa.bld_base;
218 radeon_llvm_context_init(ctx);
222 bld_base->userdata = ctx;
227 ctx->userdata = ctx;
228 ctx->load_input = llvm_load_input;
229 ctx->load_system_value = llvm_load_system_value;
247 radeon_llvm_finalize_module(ctx);
249 return ctx->gallivm.module;
