Lines Matching refs:state
35 void si_pm4_cmd_begin(struct si_pm4_state *state, unsigned opcode)
37 state->last_opcode = opcode;
38 state->last_pm4 = state->ndw++;
41 void si_pm4_cmd_add(struct si_pm4_state *state, uint32_t dw)
43 state->pm4[state->ndw++] = dw;
46 void si_pm4_cmd_end(struct si_pm4_state *state, bool predicate)
49 count = state->ndw - state->last_pm4 - 2;
50 state->pm4[state->last_pm4] = PKT3(state->last_opcode,
53 assert(state->ndw <= SI_PM4_MAX_DW);
56 void si_pm4_set_reg(struct si_pm4_state *state, unsigned reg, uint32_t val)
78 if (opcode != state->last_opcode || reg != (state->last_reg + 1)) {
79 si_pm4_cmd_begin(state, opcode);
80 si_pm4_cmd_add(state, reg);
83 state->last_reg = reg;
84 si_pm4_cmd_add(state, val);
85 si_pm4_cmd_end(state, false);
88 void si_pm4_add_bo(struct si_pm4_state *state,
92 unsigned idx = state->nbo++;
95 si_resource_reference(&state->bo[idx], bo);
96 state->bo_usage[idx] = usage;
99 void si_pm4_sh_data_begin(struct si_pm4_state *state)
101 si_pm4_cmd_begin(state, PKT3_NOP);
104 void si_pm4_sh_data_add(struct si_pm4_state *state, uint32_t dw)
106 si_pm4_cmd_add(state, dw);
109 void si_pm4_sh_data_end(struct si_pm4_state *state, unsigned reg)
111 unsigned offs = state->last_pm4 + 1;
114 if (state->ndw == offs) {
115 state->ndw--;
119 si_pm4_cmd_end(state, false);
121 si_pm4_cmd_begin(state, PKT3_SET_SH_REG_OFFSET);
122 si_pm4_cmd_add(state, (reg - SI_SH_REG_OFFSET) >> 2);
123 state->relocs[state->nrelocs++] = state->ndw;
124 si_pm4_cmd_add(state, offs << 2);
125 si_pm4_cmd_add(state, 0);
126 si_pm4_cmd_end(state, false);
129 void si_pm4_inval_shader_cache(struct si_pm4_state *state)
131 state->cp_coher_cntl |= S_0085F0_SH_ICACHE_ACTION_ENA(1);
132 state->cp_coher_cntl |= S_0085F0_SH_KCACHE_ACTION_ENA(1);
135 void si_pm4_inval_texture_cache(struct si_pm4_state *state)
137 state->cp_coher_cntl |= S_0085F0_TC_ACTION_ENA(1);
140 void si_pm4_inval_vertex_cache(struct si_pm4_state *state)
143 state->cp_coher_cntl |= S_0085F0_TC_ACTION_ENA(1);
146 void si_pm4_inval_fb_cache(struct si_pm4_state *state, unsigned nr_cbufs)
148 state->cp_coher_cntl |= S_0085F0_CB_ACTION_ENA(1);
149 state->cp_coher_cntl |= ((1 << nr_cbufs) - 1) << S_0085F0_CB0_DEST_BASE_ENA_SHIFT;
152 void si_pm4_inval_zsbuf_cache(struct si_pm4_state *state)
154 state->cp_coher_cntl |= S_0085F0_DB_ACTION_ENA(1) | S_0085F0_DB_DEST_BASE_ENA(1);
158 struct si_pm4_state *state,
161 if (state == NULL)
164 if (idx != ~0 && rctx->emitted.array[idx] == state) {
168 for (int i = 0; i < state->nbo; ++i) {
169 si_resource_reference(&state->bo[i], NULL);
171 FREE(state);
179 struct si_pm4_state *state = rctx->queued.array[i];
181 if (!state || rctx->emitted.array[i] == state)
184 cp_coher_cntl |= state->cp_coher_cntl;
194 struct si_pm4_state *state = rctx->queued.array[i];
196 if (!state || rctx->emitted.array[i] == state)
199 count += state->ndw;
205 void si_pm4_emit(struct r600_context *rctx, struct si_pm4_state *state)
208 for (int i = 0; i < state->nbo; ++i) {
209 r600_context_bo_reloc(rctx, state->bo[i],
210 state->bo_usage[i]);
213 memcpy(&cs->buf[cs->cdw], state->pm4, state->ndw * 4);
215 for (int i = 0; i < state->nrelocs; ++i) {
216 cs->buf[cs->cdw + state->relocs[i]] += cs->cdw << 2;
219 cs->cdw += state->ndw;
225 struct si_pm4_state *state = rctx->queued.array[i];
227 if (!state || rctx->emitted.array[i] == state)
230 si_pm4_emit(rctx, state);
231 rctx->emitted.array[i] = state;
