Home | History | Annotate | Download | only in softpipe

Lines Matching full:vmin

84    const float (*vmin)[4];
306 setup->vmin = v0;
312 setup->vmin = v2;
318 setup->vmin = v0;
326 setup->vmin = v1;
332 setup->vmin = v2;
338 setup->vmin = v1;
345 setup->ebot.dx = setup->vmid[0][0] - setup->vmin[0][0];
346 setup->ebot.dy = setup->vmid[0][1] - setup->vmin[0][1];
347 setup->emaj.dx = setup->vmax[0][0] - setup->vmin[0][0];
348 setup->emaj.dy = setup->vmax[0][1] - setup->vmin[0][1];
479 * v[0], v[1] and v[2] are vmin, vmid and vmax, respectively.
508 * to define a0 as the sample at a pixel center somewhere near vmin
512 (dadx * (setup->vmin[0][0] - setup->pixel_offset) +
513 dady * (setup->vmin[0][1] - setup->pixel_offset)));
532 * v[0], v[1] and v[2] are vmin, vmid and vmax, respectively.
542 float mina = v[0] * setup->vmin[0][3];
554 setup->vmin[vertSlot][i],
564 (dadx * (setup->vmin[0][0] - setup->pixel_offset) +
565 dady * (setup->vmin[0][1] - setup->pixel_offset)));
604 * Must be called after setup->vmin,vmid,vmax,vprovoke are initialized.
617 v[0] = setup->vmin[0][2];
622 v[0] = setup->vmin[0][3];
640 tri_apply_cylindrical_wrap(setup->vmin[vertSlot][j],
650 tri_apply_cylindrical_wrap(setup->vmin[vertSlot][j],
678 float vmin_x = setup->vmin[0][0] + setup->pixel_offset;
681 float vmin_y = setup->vmin[0][1] - setup->pixel_offset;
897 * v[0] and v[1] are vmin and vmax, respectively.
911 (dadx * (setup->vmin[0][0] - setup->pixel_offset) +
912 dady * (setup->vmin[0][1] - setup->pixel_offset)));
919 * v[0] and v[1] are vmin and vmax, respectively.
927 const float a0 = v[0] * setup->vmin[0][3];
935 (dadx * (setup->vmin[0][0] - setup->pixel_offset) +
936 dady * (setup->vmin[0][1] - setup->pixel_offset)));
942 * Must be called after setup->vmin,vmax are initialized.
956 /* use setup->vmin, vmax to point to vertices */
961 setup->vmin = v0;
964 setup->emaj.dx = setup->vmax[0][0] - setup->vmin[0][0];
965 setup->emaj.dy = setup->vmax[0][1] - setup->vmin[0][1];
975 v[0] = setup->vmin[0][2];
979 v[0] = setup->vmin[0][3];
996 line_apply_cylindrical_wrap(setup->vmin[vertSlot][j],
1005 line_apply_cylindrical_wrap(setup->vmin[vertSlot][j],