Lines Matching refs:T1
13 # UltraSPARC T1 by packing X[16] to 8 64-bit registers.
15 # SHA512 on pre-T1 UltraSPARC.
24 # SHA512 on UltraSPARC T1.
37 # (*) Unlike pre-T1 UltraSPARC loads on T1 are executed strictly
40 # not dependent on load result! This means that on T1 two 32-bit
42 # is unlike pre-T1 UltraSPARC, where, if scheduled appropriately,
107 $T1="%g2";
137 ldx [$inp+64],$T1
147 srlx $T1,$tmp32,$T1
148 or $T1,@X[7],@X[7]
154 $code.="\tadd @X[$i/2],$h,$T1\n";
156 $code.="\tsrlx @X[$i/2],32,$T1\n\tadd $h,$T1,$T1\n";
184 add $h,$tmp2,$T1
203 add $h,$tmp2,$T1
218 $code.="\tadd $h,$T1,$T1\n";
238 add $tmp2,$T1,$T1
241 add $tmp0,$T1,$T1
256 add $tmp2,$T1,$T1 ! +=K[$i]
259 add $T1,$d,$d
260 add $T1,$h,$h
276 srl $xi,@sigma0[0],$T1 !! Xupdate($i)
279 xor $tmp1,$T1,$T1
281 xor $tmp0,$T1,$T1
283 xor $tmp1,$T1,$T1
293 xor $tmp0,$T1,$T1 ! T1=sigma0(X[i+1])
309 add $xi,$T1,$T1 ! +=X[i]
311 add $tmp1,$T1,$T1
313 srl $T1,0,$T1
314 or $T1,@X[($i/2)%8],@X[($i/2)%8]
321 add $xi,$T1,$T1 ! +=X[i+9]
324 add $tmp1,$T1,$T1
326 sllx $T1,32,$tmp0
342 srlx $tmp0,@sigma0[0],$T1
347 xor $tmp1,$T1,$T1
349 xor $tmp0,$T1,$T1
351 xor $tmp1,$T1,$T1
353 xor $tmp0,$T1,$T1 ! sigma0(X[$i+1])
373 add $tmp1,$T1,$T1
376 add $tmp0,$T1,$T1 ! +=X[$i+9]
378 add $tmp2,$T1,$T1 ! +=X[$i]
379 $ST $T1,[%sp+`$bias+$frame+($i%16)*$SZ`]
544 sllx %l6,32,$T1
546 or %l7,$T1,$T1
549 add $T1,$D,$D
570 sllx %l6,32,$T1
572 or %l7,$T1,$T1
575 add $T1,$H,$H
