Lines Matching full:__u8
36 __u8 last_irr; /* edge detection */
37 __u8 irr; /* interrupt request register */
38 __u8 imr; /* interrupt mask register */
39 __u8 isr; /* interrupt service register */
40 __u8 priority_add; /* highest irq priority */
41 __u8 irq_base;
42 __u8 read_reg_select;
43 __u8 poll;
44 __u8 special_mask;
45 __u8 init_state;
46 __u8 auto_eoi;
47 __u8 rotate_on_auto_eoi;
48 __u8 special_fully_nested_mode;
49 __u8 init4; /* true if 4 byte init */
50 __u8 elcr; /* PIIX edge/trigger selection */
51 __u8 elcr_mask;
64 __u8 vector;
65 __u8 delivery_mode:3;
66 __u8 dest_mode:1;
67 __u8 delivery_status:1;
68 __u8 polarity:1;
69 __u8 remote_irr:1;
70 __u8 trig_mode:1;
71 __u8 mask:1;
72 __u8 reserve:7;
73 __u8 reserved[4];
74 __u8 dest_id;
103 __u8 type;
104 __u8 present, dpl, db, s, l, g, avl;
105 __u8 unusable;
106 __u8 padding;
130 __u8 fpr[8][16];
133 __u8 ftwx; /* in fxsave format */
134 __u8 pad1;
138 __u8 xmm[16][16];
206 __u8 count_latched;
207 __u8 status_latched;
208 __u8 status;
209 __u8 read_state;
210 __u8 write_state;
211 __u8 write_latch;
212 __u8 rw_mode;
213 __u8 mode;
214 __u8 bcd;
215 __u8 gate;
250 __u8 pit_reinject;
251 __u8 reserved[31];
