Lines Matching refs:branch
302 "p" 16 bit PC relative branch target address (OP_*_DELTA)
344 "N" 3 bit branch condition code (OP_*_BCC) (only used for mips4 and up)
464 /* Instruction has unconditional branch delay slot. */
466 /* Instruction has conditional branch delay slot. */
468 /* Conditional branch likely: if branch not taken, insn nullified. */
995 "p" 8 bit conditional branch address (MIPS16OP_*_IMM8)
996 "q" 11 bit branch address (MIPS16OP_*_IMM11)
1040 /* Is a branch insn. */
1170 However, "bposge32" is a branch instruction that depends on the "pos"
2377 /* Coprocessor 2 move/branch operations overlap with VR5400 .ob format
2404 /* Coprocessor 3 move/branch operations overlap with MIPS IV COP1X
4030 /* Figure out instruction type and branch delay information. */
4391 int immed, nbits, shift, signedp, extbits, pcrel, extu, branch;
4398 branch = 0;
4512 branch = 1;
4520 branch = 1;
4578 if (branch)
4620 if (pcrel && branch
