Lines Matching full:op_mask
1598 #define OP_MASK OP (0x3f)
1604 #define OPTO_MASK (OP_MASK | TO_MASK)
1669 #define DRA_MASK (OP_MASK | RA_MASK)
1715 #define SC_MASK (OP_MASK | (((unsigned long)0x3ff) << 16) | (((unsigned long)1) << 1) | 1)
2030 { "tdi", OP(2), OP_MASK, PPC64, { TO, RA, SI } },
2060 { "twi", OP(3), OP_MASK, PPCCOM, { TO, RA, SI } },
2061 { "ti", OP(3), OP_MASK, PWRCOM, { TO, RA, SI } },
2588 { "mulli", OP(7), OP_MASK, PPCCOM, { RT, RA, SI } },
2589 { "muli", OP(7), OP_MASK, PWRCOM, { RT, RA, SI } },
2591 { "subfic", OP(8), OP_MASK, PPCCOM, { RT, RA, SI } },
2592 { "sfi", OP(8), OP_MASK, PWRCOM, { RT, RA, SI } },
2594 { "dozi", OP(9), OP_MASK, M601, { RT, RA, SI } },
2603 { "cmpli", OP(10), OP_MASK, PPC, { BF, L, RA, UI } },
2604 { "cmpli", OP(10), OP_MASK, PWRCOM, { BF, RA, UI } },
2608 { "cmpi", OP(11), OP_MASK, PPC, { BF, L, RA, SI } },
2609 { "cmpi", OP(11), OP_MASK, PWRCOM, { BF, RA, SI } },
2611 { "addic", OP(12), OP_MASK, PPCCOM, { RT, RA, SI } },
2612 { "ai", OP(12), OP_MASK, PWRCOM, { RT, RA, SI } },
2613 { "subic", OP(12), OP_MASK, PPCCOM, { RT, RA, NSI } },
2615 { "addic.", OP(13), OP_MASK, PPCCOM, { RT, RA, SI } },
2616 { "ai.", OP(13), OP_MASK, PWRCOM, { RT, RA, SI } },
2617 { "subic.", OP(13), OP_MASK, PPCCOM, { RT, RA, NSI } },
2621 { "addi", OP(14), OP_MASK, PPCCOM, { RT, RA0, SI } },
2622 { "cal", OP(14), OP_MASK, PWRCOM, { RT, D, RA0 } },
2623 { "subi", OP(14), OP_MASK, PPCCOM, { RT, RA0, NSI } },
2624 { "la", OP(14), OP_MASK, PPCCOM, { RT, D, RA0 } },
2628 { "addis", OP(15), OP_MASK, PPCCOM, { RT,RA0,SISIGNOPT } },
2629 { "cau", OP(15), OP_MASK, PWRCOM, { RT,RA0,SISIGNOPT } },
2630 { "subis", OP(15), OP_MASK, PPCCOM, { RT, RA0, NSI } },
3357 { "ori", OP(24), OP_MASK, PPCCOM, { RA, RS, UI } },
3358 { "oril", OP(24), OP_MASK, PWRCOM, { RA, RS, UI } },
3360 { "oris", OP(25), OP_MASK, PPCCOM, { RA, RS, UI } },
3361 { "oriu", OP(25), OP_MASK, PWRCOM, { RA, RS, UI } },
3363 { "xori", OP(26), OP_MASK, PPCCOM, { RA, RS, UI } },
3364 { "xoril", OP(26), OP_MASK, PWRCOM, { RA, RS, UI } },
3366 { "xoris", OP(27), OP_MASK, PPCCOM, { RA, RS, UI } },
3367 { "xoriu", OP(27), OP_MASK, PWRCOM, { RA, RS, UI } },
3369 { "andi.", OP(28), OP_MASK, PPCCOM, { RA, RS, UI } },
3370 { "andil.", OP(28), OP_MASK, PWRCOM, { RA, RS, UI } },
3372 { "andis.", OP(29), OP_MASK, PPCCOM, { RA, RS, UI } },
3373 { "andiu.", OP(29), OP_MASK, PWRCOM, { RA, RS, UI } },
4628 { "lwz", OP(32), OP_MASK, PPCCOM, { RT, D, RA0 } },
4629 { "l", OP(32), OP_MASK, PWRCOM, { RT, D, RA0 } },
4631 { "lwzu", OP(33), OP_MASK, PPCCOM, { RT, D, RAL } },
4632 { "lu", OP(33), OP_MASK, PWRCOM, { RT, D, RA0 } },
4634 { "lbz", OP(34), OP_MASK, COM, { RT, D, RA0 } },
4636 { "lbzu", OP(35), OP_MASK, COM, { RT, D, RAL } },
4638 { "stw", OP(36), OP_MASK, PPCCOM, { RS, D, RA0 } },
4639 OP_MASK, PWRCOM, { RS, D, RA0 } },
4641 { "stwu", OP(37), OP_MASK, PPCCOM, { RS, D, RAS } },
4642 { "stu", OP(37), OP_MASK, PWRCOM, { RS, D, RA0 } },
4644 { "stb", OP(38), OP_MASK, COM, { RS, D, RA0 } },
4646 { "stbu", OP(39), OP_MASK, COM, { RS, D, RAS } },
4648 { "lhz", OP(40), OP_MASK, COM, { RT, D, RA0 } },
4650 { "lhzu", OP(41), OP_MASK, COM, { RT, D, RAL } },
4652 { "lha", OP(42), OP_MASK, COM, { RT, D, RA0 } },
4654 { "lhau", OP(43), OP_MASK, COM, { RT, D, RAL } },
4656 { "sth", OP(44), OP_MASK, COM, { RS, D, RA0 } },
4658 { "sthu", OP(45), OP_MASK, COM, { RS, D, RAS } },
4660 { "lmw", OP(46), OP_MASK, PPCCOM, { RT, D, RAM } },
4661 { "lm", OP(46), OP_MASK, PWRCOM, { RT, D, RA0 } },
4663 { "stmw", OP(47), OP_MASK, PPCCOM, { RS, D, RA0 } },
4664 { "stm", OP(47), OP_MASK, PWRCOM, { RS, D, RA0 } },
4666 { "lfs", OP(48), OP_MASK, COM, { FRT, D, RA0 } },
4668 { "lfsu", OP(49), OP_MASK, COM, { FRT, D, RAS } },
4670 { "lfd", OP(50), OP_MASK, COM, { FRT, D, RA0 } },
4672 { "lfdu", OP(51), OP_MASK, COM, { FRT, D, RAS } },
4674 { "stfs", OP(52), OP_MASK, COM, { FRS, D, RA0 } },
4676 { "stfsu", OP(53), OP_MASK, COM, { FRS, D, RAS } },
4678 { "stfd", OP(54), OP_MASK, COM, { FRS, D, RA0 } },
4680 { "stfdu", OP(55), OP_MASK, COM, { FRS, D, RAS } },
4682 { "lq", OP(56), OP_MASK, POWER4, { RTQ, DQ, RAQ } },
4684 { "lfq", OP(56), OP_MASK, POWER2, { FRT, D, RA0 } },
4686 { "lfqu", OP(57), OP_MASK, POWER2, { FRT, D, RA0 } },
4688 { "lfdp", OP(57), OP_MASK, POWER6, { FRT, D, RA0 } },
4811 { "stfq", OP(60), OP_MASK, POWER2, { FRS, D, RA } },
4813 { "stfqu", OP(61), OP_MASK, POWER2, { FRS, D, RA } },
4815 { "stfdp", OP(61), OP_MASK, POWER6, { FRT, D, RA0 } },
