Lines Matching full:opcode
45 /* indirect opcode tables */
117 /* Reserved major opcode */
465 uint32_t opcode;
507 ctx->pc, ctx->opcode , ## __VA_ARGS__)
516 MIPS_DEBUG("Invalid %s %03x %03x %03x", op, ctx->opcode >> 26, \
517 ctx->opcode & 0x3F, ((ctx->opcode >> 16) & 0x1F)); \
835 opcode tables. */
1434 switch ((ctx->opcode >> 21) & 0x1f) {
1484 switch ((ctx->opcode >> 21) & 0x1f) {
1518 switch ((ctx->opcode >> 21) & 0x1f) {
1886 switch ((ctx->opcode >> 6) & 0x1f) {
1934 switch ((ctx->opcode >> 6) & 0x1f) {
5562 gen_mfc0(env, ctx, cpu_gpr[rt], rd, ctx->opcode & 0x7);
5570 gen_mtc0(env, ctx, t0, rd, ctx->opcode & 0x7);
5582 gen_dmfc0(env, ctx, cpu_gpr[rt], rd, ctx->opcode & 0x7);
5591 gen_dmtc0(env, ctx, t0, rd, ctx->opcode & 0x7);
5603 gen_mftr(env, ctx, rt, rd, (ctx->opcode >> 5) & 1,
5604 ctx->opcode & 0x7, (ctx->opcode >> 4) & 1);
5609 gen_mttr(env, ctx, rd, rt, (ctx->opcode >> 5) & 1,
5610 ctx->opcode & 0x7, (ctx->opcode >> 4) & 1);
6014 uint32_t func = ctx->opcode & 0x3f;
6016 switch (ctx->opcode & FOP(0x3f, 0x1f)) {
6412 if (ctx->opcode & (1 << 6)) {
6775 if (ctx->opcode & (1 << 6)) {
7213 if (ctx->opcode & (1 << 6)) {
7656 op = MASK_OP_MAJOR(ctx->opcode);
7657 rs = (ctx->opcode >> 21) & 0x1f;
7658 rt = (ctx->opcode >> 16) & 0x1f;
7659 rd = (ctx->opcode >> 11) & 0x1f;
7660 sa = (ctx->opcode >> 6) & 0x1f;
7661 imm = (int16_t)ctx->opcode;
7664 op1 = MASK_SPECIAL(ctx->opcode);
7697 op1 = MASK_MUL_VR54XX(ctx->opcode);
7750 gen_movci(ctx, rd, rs, (ctx->opcode >> 18) & 0x7,
7751 (ctx->opcode >> 16) & 1);
7794 op1 = MASK_SPECIAL2(ctx->opcode);
7836 op1 = MASK_SPECIAL3(ctx->opcode);
7845 op2 = MASK_BSHFL(ctx->opcode);
7926 op2 = MASK_DBSHFL(ctx->opcode);
7937 op1 = MASK_REGIMM(ctx->opcode);
7959 op1 = MASK_CP0(ctx->opcode);
7975 gen_cp0(env, ctx, MASK_C0(ctx->opcode), rt, rd);
7983 op2 = MASK_MFMC0(ctx->opcode);
8044 case OPC_ADDI: /* Arithmetic with immediate opcode */
8048 case OPC_SLTI: /* Set on less than with immediate opcode */
8052 case OPC_ANDI: /* Arithmetic with immediate opcode */
8059 offset = (int32_t)(ctx->opcode & 0x3FFFFFF) << 2;
8100 op1 = MASK_CP1(ctx->opcode);
8124 gen_compute_branch1(env, ctx, MASK_BC1(ctx->opcode),
8132 gen_farith(ctx, MASK_CP1_FUNC(ctx->opcode), rt, rd, sa,
8158 op1 = MASK_CP3(ctx->opcode);
8227 MIPS_INVAL("major opcode");
8348 ctx.opcode = ldl_code(ctx.pc);
