Lines Matching refs:simm24
12490 // BLX (1), viz, unconditional branch and link to R15+simm2412495 Int simm24 = (((uimm24 << 8) >> 8) << 2) + (bitH << 1);12503 UInt dst = guest_R15_curr_instr_notENC + 8 + (simm24 | 1);13500 Int simm24 = (Int)uimm24;13502 + (((simm24 << 8) >> 8) << 2);