Lines Matching refs:VexGuestMIPS32State
97 ret = offsetof(VexGuestMIPS32State, guest_r0); break;
99 ret = offsetof(VexGuestMIPS32State, guest_r1); break;
101 ret = offsetof(VexGuestMIPS32State, guest_r2); break;
103 ret = offsetof(VexGuestMIPS32State, guest_r3); break;
105 ret = offsetof(VexGuestMIPS32State, guest_r4); break;
107 ret = offsetof(VexGuestMIPS32State, guest_r5); break;
109 ret = offsetof(VexGuestMIPS32State, guest_r6); break;
111 ret = offsetof(VexGuestMIPS32State, guest_r7); break;
113 ret = offsetof(VexGuestMIPS32State, guest_r8); break;
115 ret = offsetof(VexGuestMIPS32State, guest_r9); break;
117 ret = offsetof(VexGuestMIPS32State, guest_r10); break;
119 ret = offsetof(VexGuestMIPS32State, guest_r11); break;
121 ret = offsetof(VexGuestMIPS32State, guest_r12); break;
123 ret = offsetof(VexGuestMIPS32State, guest_r13); break;
125 ret = offsetof(VexGuestMIPS32State, guest_r14); break;
127 ret = offsetof(VexGuestMIPS32State, guest_r15); break;
129 ret = offsetof(VexGuestMIPS32State, guest_r16); break;
131 ret = offsetof(VexGuestMIPS32State, guest_r17); break;
133 ret = offsetof(VexGuestMIPS32State, guest_r18); break;
135 ret = offsetof(VexGuestMIPS32State, guest_r19); break;
137 ret = offsetof(VexGuestMIPS32State, guest_r20); break;
139 ret = offsetof(VexGuestMIPS32State, guest_r21); break;
141 ret = offsetof(VexGuestMIPS32State, guest_r22); break;
143 ret = offsetof(VexGuestMIPS32State, guest_r23); break;
145 ret = offsetof(VexGuestMIPS32State, guest_r24); break;
147 ret = offsetof(VexGuestMIPS32State, guest_r25); break;
149 ret = offsetof(VexGuestMIPS32State, guest_r26); break;
151 ret = offsetof(VexGuestMIPS32State, guest_r27); break;
153 ret = offsetof(VexGuestMIPS32State, guest_r28); break;
155 ret = offsetof(VexGuestMIPS32State, guest_r29); break;
157 ret = offsetof(VexGuestMIPS32State, guest_r30); break;
159 ret = offsetof(VexGuestMIPS32State, guest_r31); break;
167 #define OFFB_PC offsetof(VexGuestMIPS32State, guest_PC)
177 ret = offsetof(VexGuestMIPS32State, guest_f0); break;
179 ret = offsetof(VexGuestMIPS32State, guest_f1); break;
181 ret = offsetof(VexGuestMIPS32State, guest_f2); break;
183 ret = offsetof(VexGuestMIPS32State, guest_f3); break;
185 ret = offsetof(VexGuestMIPS32State, guest_f4); break;
187 ret = offsetof(VexGuestMIPS32State, guest_f5); break;
189 ret = offsetof(VexGuestMIPS32State, guest_f6); break;
191 ret = offsetof(VexGuestMIPS32State, guest_f7); break;
193 ret = offsetof(VexGuestMIPS32State, guest_f8); break;
195 ret = offsetof(VexGuestMIPS32State, guest_f9); break;
197 ret = offsetof(VexGuestMIPS32State, guest_f10); break;
199 ret = offsetof(VexGuestMIPS32State, guest_f11); break;
201 ret = offsetof(VexGuestMIPS32State, guest_f12); break;
203 ret = offsetof(VexGuestMIPS32State, guest_f13); break;
205 ret = offsetof(VexGuestMIPS32State, guest_f14); break;
207 ret = offsetof(VexGuestMIPS32State, guest_f15); break;
209 ret = offsetof(VexGuestMIPS32State, guest_f16); break;
211 ret = offsetof(VexGuestMIPS32State, guest_f17); break;
213 ret = offsetof(VexGuestMIPS32State, guest_f18); break;
215 ret = offsetof(VexGuestMIPS32State, guest_f19); break;
217 ret = offsetof(VexGuestMIPS32State, guest_f20); break;
219 ret = offsetof(VexGuestMIPS32State, guest_f21); break;
221 ret = offsetof(VexGuestMIPS32State, guest_f22); break;
223 ret = offsetof(VexGuestMIPS32State, guest_f23); break;
225 ret = offsetof(VexGuestMIPS32State, guest_f24); break;
227 ret = offsetof(VexGuestMIPS32State, guest_f25); break;
229 ret = offsetof(VexGuestMIPS32State, guest_f26); break;
231 ret = offsetof(VexGuestMIPS32State, guest_f27); break;
233 ret = offsetof(VexGuestMIPS32State, guest_f28); break;
235 ret = offsetof(VexGuestMIPS32State, guest_f29); break;
237 ret = offsetof(VexGuestMIPS32State, guest_f30); break;
239 ret = offsetof(VexGuestMIPS32State, guest_f31); break;
715 return IRExpr_Get(offsetof(VexGuestMIPS32State, guest_HI), Ity_I32);
720 return IRExpr_Get(offsetof(VexGuestMIPS32State, guest_LO), Ity_I32);
725 return IRExpr_Get(offsetof(VexGuestMIPS32State, guest_FCSR), Ity_I32);
730 stmt(IRStmt_Put(offsetof(VexGuestMIPS32State, guest_FCSR), e));
735 return IRExpr_Get(offsetof(VexGuestMIPS32State, guest_ULR), Ity_I32);
749 stmt(IRStmt_Put(offsetof(VexGuestMIPS32State, guest_LO), e));
754 stmt(IRStmt_Put(offsetof(VexGuestMIPS32State, guest_HI), e));
954 assign(rm_MIPS, binop(Iop_And32, IRExpr_Get(offsetof(VexGuestMIPS32State,
1284 putIReg(11, IRExpr_Get(offsetof(VexGuestMIPS32State, guest_NRADDR),
1850 IRExpr_Get(offsetof(VexGuestMIPS32State,
3414 stmt(IRStmt_Put(offsetof(VexGuestMIPS32State, guest_PC),
