Lines Matching refs:fs
973 UInt fs = get_fs(cins);
981 DIP("C.cond.S %d f%d, f%d\n", fpc_cc, fs, ft);
987 assign(ccIR, binop(Iop_CmpF64, unop(Iop_F32toF64, getFReg(fs)),
1079 DIP("C.%d.D %d f%d, f%d\n", cond, fpc_cc, fs, ft);
1084 assign(ccIR, binop(Iop_CmpF64, getDReg(fs), getDReg(ft)));
1201 UInt opcode, cins, rs, rt, rd, sa, ft, fs, fd, fmt, tf, nd, function,
1310 fs = get_fs(cins);
1403 getLoFromF64(tyF, getFReg(fs)))));
1409 putDReg(fd, binop(Iop_SqrtF64, rm, getDReg(fs)));
1418 DIP("abs.s f%d, f%d\n", fd, fs);
1420 getLoFromF64(tyF, getFReg(fs)))));
1423 DIP("abs.d f%d, f%d\n", fd, fs);
1424 putDReg(fd, unop(Iop_AbsF64, getDReg(fs)));
1435 DIP("mul.d f%d, f%d, f%d", fd, fs, ft);
1437 putDReg(fd, triop(Iop_MulF64, rm, getDReg(fs),
1443 DIP("mul.s f%d, f%d, f%d", fd, fs, ft);
1446 getLoFromF64(tyF, getFReg(fs)),
1459 DIP("div.d f%d, f%d, f%d", fd, fs, ft);
1461 putDReg(fd, triop(Iop_DivF64, rm, getDReg(fs),
1467 DIP("div.s f%d, f%d, f%d", fd, fs, ft);
1470 getLoFromF64(tyF, getFReg(fs)),
1483 DIP("sub.d f%d, f%d, f%d", fd, fs, ft);
1485 putDReg(fd, triop(Iop_SubF64, rm, getDReg(fs), getDReg(ft)));
1490 DIP("sub.s f%d, f%d, f%d", fd, fs, ft);
1493 getLoFromF64(tyF, getFReg(fs)),
1506 DIP("mov.d f%d, f%d", fd, fs);
1507 putFReg(fd, getFReg(fs));
1508 putFReg(fd + 1, getFReg(fs + 1));
1511 DIP("mov.s f%d, f%d", fd, fs);
1512 putFReg(fd, getFReg(fs));
1522 DIP("neg.s f%d, f%d", fd, fs);
1524 getLoFromF64(tyF, getFReg(fs)))));
1527 DIP("neg.d f%d, f%d", fd, fs);
1528 putDReg(fd, unop(Iop_NegF64, getDReg(fs)));
1539 DIP("recip.s f%d, f%d\n", fd, fs);
1544 getFReg(fs)))));
1549 DIP("recip.d f%d, f%d\n", fd, fs);
1553 mkU64(0x3FF0000000000000ULL)), getDReg(fs)));
1565 DIP("movn.s f%d, f%d, r%d", fd, fs, rt);
1572 assign(t1, unop(Iop_F32toF64, getFReg(fs)));
1584 DIP("movn.d f%d, f%d, r%d", fd, fs, rt);
1592 getDReg(fd), getDReg(fs)));
1602 DIP("movz.s f%d, f%d, r%d", fd, fs, rt);
1609 assign(t1, unop(Iop_F32toF64, getFReg(fs)));
1621 DIP("movz.d f%d, f%d, r%d", fd, fs, rt);
1629 getDReg(fd), getDReg(fs)));
1642 DIP("movt.d f%d, f%d, %d", fd, fs, mov_cc);
1659 getDReg(fs), getDReg(fd)));
1663 DIP("movt.s f%d, f%d, %d", fd, fs, mov_cc);
1672 assign(t5, unop(Iop_F32toF64, getFReg(fs)));
1701 DIP("movf.d f%d, f%d, %d", fd, fs, mov_cc);
1718 getDReg(fd), getDReg(fs)));
1722 DIP("movf.s f%d, f%d, %d", fd, fs, mov_cc);
1731 assign(t5, unop(Iop_F32toF64, getFReg(fs)));
1761 DIP("add.s f%d, f%d, f%d\n", fd, fs, ft);
1764 getLoFromF64(tyF, getFReg(fs)),
1770 DIP("add.d f%d, f%d, f%d\n", fd, fs, ft);
1772 putDReg(fd, triop(Iop_AddF64, rm, getDReg(fs),
1778 DIP("mtc1 r%d, f%d", rt, fs);
1779 putFReg(fs, unop(Iop_ReinterpI32asF32, getIReg(rt)));
1783 DIP("mfc1 r%d, f%d", rt, fs);
1784 putIReg(rt, unop(Iop_ReinterpF32asI32, getFReg(fs)));
1788 DIP("ctc1 r%d, f%d", rt, fs);
1797 if (fs == 25) { //FCCR
1809 } else if (fs == 26) { //FEXR
1820 } else if (fs == 28) {
1834 } else if (fs == 31) {
1839 DIP("cfc1 r%d, f%d", rt, fs);
1848 if (fs == 0) {
1854 } else if (fs == 25) {
1863 } else if (fs == 26) {
1872 } else if (fs == 28) {
1881 } else if (fs == 31) {
1893 DIP("cvt.d.s f%d, f%d", fd, fs);
1894 putDReg(fd, unop(Iop_F32toF64, getFReg(fs)));
1899 DIP("cvt.d.w %d, %d\n", fd, fs);
1901 assign(t0, unop(Iop_ReinterpF32asI32, getFReg(fs)));
1914 DIP("cvt.s.w %d, %d\n", fd, fs);
1916 assign(t0, unop(Iop_ReinterpF32asI32, getFReg(fs)));
1922 DIP("cvt.s.d %d, %d\n", fd, fs);
1924 getDReg(fs)));
1935 DIP("cvt.w.s %d, %d\n", fd, fs);
1937 getFReg(fs)));
1942 DIP("cvt.w.d %d, %d\n", fd, fs);
1946 getDReg(fs)));
1961 DIP("trunc.l.s %d, %d\n", fd, fs);
1965 DIP("trunc.l.d %d, %d\n", fd, fs);
1977 DIP("round.w.s f%d, f%d\n", fd, fs);
1979 getFReg(fs)));
1983 DIP("round.w.d f%d, f%d\n", fd, fs);
1986 assign(t0, binop(Iop_F64toI32S, mkU32(0x0), getDReg(fs)));
2000 DIP("floor.w.s f%d, f%d\n", fd, fs);
2002 getFReg(fs)));
2006 DIP("floor.w.d f%d, f%d\n", fd, fs);
2009 assign(t0, binop(Iop_F64toI32S, mkU32(0x1), getDReg(fs)));
2023 DIP("trunc.w.s %d, %d\n", fd, fs);
2025 getFReg(fs)));
2029 DIP("trunc.w.d %d, %d\n", fd, fs);
2032 assign(t0, binop(Iop_F64toI32S, mkU32(0x3), getDReg(fs)));
2045 DIP("ceil.w.s %d, %d\n", fd, fs);
2047 getFReg(fs)));
2051 DIP("ceil.w.d %d, %d\n", fd, fs);
2054 assign(t0, binop(Iop_F64toI32S, mkU32(0x2), getDReg(fs)));
2067 DIP("ceil.l.s %d, %d\n", fd, fs);
2071 DIP("ceil.l.d %d, %d\n", fd, fs);
2085 DIP("rsqrt.s %d, %d\n", fd, fs);
2090 getFReg(fs))))));
2095 DIP("rsqrt.d %d, %d\n", fd, fs);
2100 binop(Iop_SqrtF64, rm, getDReg(fs))));
2273 store(mkexpr(t0), getFReg(fs));
2287 store(mkexpr(t0), getFReg(fs));
2288 store(mkexpr(t1), getFReg(fs + 1));
2290 store(mkexpr(t0), getFReg(fs + 1));
2291 store(mkexpr(t1), getFReg(fs));
2302 DIP("madd.s f%d, f%d, f%d, f%d", fmt, ft, fs, fd);
2305 assign(t1, triop(Iop_MulF32, rm, getLoFromF64(tyF, getFReg(fs)),
2313 DIP("madd.d f%d, f%d, f%d, f%d", fmt, ft, fs, fd);
2316 assign(t1, triop(Iop_MulF64, rm, getDReg(fs), getDReg(ft)));
2322 DIP("msub.s f%d, f%d, f%d, f%d", fmt, ft, fs, fd);
2325 assign(t1, triop(Iop_MulF32, rm, getLoFromF64(tyF, getFReg(fs)),
2333 DIP("msub.d f%d, f%d, f%d, f%d", fmt, ft, fs, fd);
2336 assign(t1, triop(Iop_MulF64, rm, getDReg(fs), getDReg(ft)));
2342 DIP("nmadd.s f%d, f%d, f%d, f%d", fmt, ft, fs, fd);
2346 assign(t1, triop(Iop_MulF32, rm, getLoFromF64(tyF, getFReg(fs)),
2356 DIP("nmadd.d f%d, f%d, f%d, f%d", fmt, ft, fs, fd);
2360 assign(t1, triop(Iop_MulF64, rm, getDReg(fs), getDReg(ft)));
2367 DIP("nmsub.s f%d, f%d, f%d, f%d", fmt, ft, fs, fd);
2371 assign(t1, triop(Iop_MulF32, rm, getLoFromF64(tyF, getFReg(fs)),
2381 DIP("nmsub.d f%d, f%d, f%d, f%d", fmt, ft, fs, fd);
2385 assign(t1, triop(Iop_MulF64, rm, getDReg(fs), getDReg(ft)));
