Lines Matching refs:addHRegUse
248 addHRegUse(u, HRmRead, am->Aam.IR.reg);
251 addHRegUse(u, HRmRead, am->Aam.IRRS.base);
252 addHRegUse(u, HRmRead, am->Aam.IRRS.index);
327 addHRegUse(u, HRmRead, op->Armi.Reg.reg);
389 addHRegUse(u, HRmRead, op->Ari.Reg.reg);
450 addHRegUse(u, mode, op->Arm.Reg.reg);
1333 addHRegUse(u, HRmWrite, i->Ain.Imm64.dst);
1338 addHRegUse(u, HRmWrite, i->Ain.Alu64R.dst);
1342 addHRegUse(u, HRmRead, i->Ain.Alu64R.dst);
1345 addHRegUse(u, HRmModify, i->Ain.Alu64R.dst);
1352 addHRegUse(u, HRmModify, i->Ain.Sh64.dst);
1354 addHRegUse(u, HRmRead, hregAMD64_RCX());
1357 addHRegUse(u, HRmRead, i->Ain.Test64.dst);
1360 addHRegUse(u, HRmModify, i->Ain.Unary64.dst);
1364 addHRegUse(u, HRmWrite, i->Ain.Lea64.dst);
1370 addHRegUse(u, HRmRead, i->Ain.Alu32R.dst);
1373 addHRegUse(u, HRmModify, i->Ain.Alu32R.dst);
1377 addHRegUse(u, HRmModify, hregAMD64_RAX());
1378 addHRegUse(u, HRmWrite, hregAMD64_RDX());
1382 addHRegUse(u, HRmModify, hregAMD64_RAX());
1383 addHRegUse(u, HRmModify, hregAMD64_RDX());
1387 addHRegUse(u, HRmModify, hregAMD64_RSP());
1396 addHRegUse(u, HRmWrite, hregAMD64_RAX());
1397 addHRegUse(u, HRmWrite, hregAMD64_RCX());
1398 addHRegUse(u, HRmWrite, hregAMD64_RDX());
1399 addHRegUse(u, HRmWrite, hregAMD64_RSI());
1400 addHRegUse(u, HRmWrite, hregAMD64_RDI());
1401 addHRegUse(u, HRmWrite, hregAMD64_R8());
1402 addHRegUse(u, HRmWrite, hregAMD64_R9());
1403 addHRegUse(u, HRmWrite, hregAMD64_R10());
1404 addHRegUse(u, HRmWrite, hregAMD64_R11());
1405 addHRegUse(u, HRmWrite, hregAMD64_XMM0());
1406 addHRegUse(u, HRmWrite, hregAMD64_XMM1());
1407 addHRegUse(u, HRmWrite, hregAMD64_XMM3());
1408 addHRegUse(u, HRmWrite, hregAMD64_XMM4());
1409 addHRegUse(u, HRmWrite, hregAMD64_XMM5());
1410 addHRegUse(u, HRmWrite, hregAMD64_XMM6());
1411 addHRegUse(u, HRmWrite, hregAMD64_XMM7());
1412 addHRegUse(u, HRmWrite, hregAMD64_XMM8());
1413 addHRegUse(u, HRmWrite, hregAMD64_XMM9());
1414 addHRegUse(u, HRmWrite, hregAMD64_XMM10());
1415 addHRegUse(u, HRmWrite, hregAMD64_XMM11());
1416 addHRegUse(u, HRmWrite, hregAMD64_XMM12());
1421 case 6: addHRegUse(u, HRmRead, hregAMD64_R9()); /*fallthru*/
1422 case 5: addHRegUse(u, HRmRead, hregAMD64_R8()); /*fallthru*/
1423 case 4: addHRegUse(u, HRmRead, hregAMD64_RCX()); /*fallthru*/
1424 case 3: addHRegUse(u, HRmRead, hregAMD64_RDX()); /*fallthru*/
1425 case 2: addHRegUse(u, HRmRead, hregAMD64_RSI()); /*fallthru*/
1426 case 1: addHRegUse(u, HRmRead, hregAMD64_RDI()); break;
1434 addHRegUse(u, HRmWrite, hregAMD64_R11());
1450 addHRegUse(u, HRmRead, i->Ain.XIndir.dstGA);
1455 addHRegUse(u, HRmRead, i->Ain.XAssisted.dstGA);
1460 addHRegUse(u, HRmModify, i->Ain.CMov64.dst);
1463 addHRegUse(u, HRmRead, i->Ain.MovxLQ.src);
1464 addHRegUse(u, HRmWrite, i->Ain.MovxLQ.dst);
1468 addHRegUse(u, HRmWrite, i->Ain.LoadEX.dst);
1471 addHRegUse(u, HRmRead, i->Ain.Store.src);
1475 addHRegUse(u, HRmWrite, i->Ain.Set64.dst);
1478 addHRegUse(u, HRmRead, i->Ain.Bsfr64.src);
1479 addHRegUse(u, HRmWrite, i->Ain.Bsfr64.dst);
1485 addHRegUse(u, HRmRead, hregAMD64_RBX());
1486 addHRegUse(u, HRmModify, hregAMD64_RAX());
1490 addHRegUse(u, HRmRead, hregAMD64_RCX());
1491 addHRegUse(u, HRmRead, hregAMD64_RBX());
1492 addHRegUse(u, HRmModify, hregAMD64_RDX());
1493 addHRegUse(u, HRmModify, hregAMD64_RAX());
1512 addHRegUse(u, HRmRead, i->Ain.SseUComIS.srcL);
1513 addHRegUse(u, HRmRead, i->Ain.SseUComIS.srcR);
1514 addHRegUse(u, HRmWrite, i->Ain.SseUComIS.dst);
1517 addHRegUse(u, HRmRead, i->Ain.SseSI2SF.src);
1518 addHRegUse(u, HRmWrite, i->Ain.SseSI2SF.dst);
1521 addHRegUse(u, HRmRead, i->Ain.SseSF2SI.src);
1522 addHRegUse(u, HRmWrite, i->Ain.SseSF2SI.dst);
1525 addHRegUse(u, HRmRead, i->Ain.SseSDSS.src);
1526 addHRegUse(u, HRmWrite, i->Ain.SseSDSS.dst);
1530 addHRegUse(u, i->Ain.SseLdSt.isLoad ? HRmWrite : HRmRead,
1535 addHRegUse(u, HRmWrite, i->Ain.SseLdzLO.reg);
1542 addHRegUse(u, HRmRead, i->Ain.Sse32Fx4.src);
1543 addHRegUse(u, unary ? HRmWrite : HRmModify,
1551 addHRegUse(u, HRmRead, i->Ain.Sse32FLo.src);
1552 addHRegUse(u, unary ? HRmWrite : HRmModify,
1560 addHRegUse(u, HRmRead, i->Ain.Sse64Fx2.src);
1561 addHRegUse(u, unary ? HRmWrite : HRmModify,
1569 addHRegUse(u, HRmRead, i->Ain.Sse64FLo.src);
1570 addHRegUse(u, unary ? HRmWrite : HRmModify,
1581 addHRegUse(u, HRmWrite, i->Ain.SseReRg.dst);
1583 addHRegUse(u, HRmRead, i->Ain.SseReRg.src);
1584 addHRegUse(u, i->Ain.SseReRg.op == Asse_MOV
1590 addHRegUse(u, HRmRead, i->Ain.SseCMov.src);
1591 addHRegUse(u, HRmModify, i->Ain.SseCMov.dst);
1594 addHRegUse(u, HRmRead, i->Ain.SseShuf.src);
1595 addHRegUse(u, HRmWrite, i->Ain.SseShuf.dst);
1599 //uu addHRegUse(u, i->Ain.AvxLdSt.isLoad ? HRmWrite : HRmRead,
1607 //uu addHRegUse(u, HRmWrite, i->Ain.AvxReRg.dst);
1609 //uu addHRegUse(u, HRmRead, i->Ain.AvxReRg.src);
1610 //uu addHRegUse(u, i->Ain.AvxReRg.op == Asse_MOV
1622 addHRegUse(u, HRmWrite, hregAMD64_R11());
