Lines Matching full:rounding
475 /* TODO: clarify semantics wrt rounding, negative values, whatever */
543 /* Binary operations, with rounding. */
555 /* Unary operations, without rounding. */
562 /* Unary operations, with rounding. */
585 IRRoundingMode) which is an indication of the rounding mode
620 Rounding is required whenever the destination type cannot
681 /* Binary ops, with rounding. */
695 /* Unary ops, with rounding. */
715 /* Ternary operations, with rounding. */
867 Vector Saturating Rounding Doubling Multiply Returning High Half */
1052 /* ROUNDING INSTRUCTIONS
1070 * immediate exponent specified by the rounding and exponent parameter.
1074 * rounding mode parameter.
1084 * significance given by the I8 operand as specified by the rounding
1177 rounding mode argument. Instead the irop trailers _R{M,P,N,Z}
1191 /* FIXME: what kind of rounding in F32x4 -> F16x4 case? */
1279 Vector Saturating Rounding Doubling Multiply Returning High Half */
1479 /* Encoding of IEEE754-specified rounding modes. This is the same as
1480 the encoding used by Intel IA32 to indicate x87 rounding mode.
1492 /* DFP encoding of IEEE754 2008 specified rounding modes extends the two bit
1493 * binary floating point rounding mode (IRRoundingMode) to three bits. The
1494 * DFP rounding modes are a super set of the binary rounding modes. The
1497 * a logical OR of the upper rounding mode bit from the POWER encoding.
