Lines Matching refs:x1
1 ###aaa eflags[0x11,0x01] al.ub[0x1] ah.ub[0x0] : => al.ub[0x1] ah.ub[0x00] eflags[0x11,0x00]
5 ###aaa eflags[0x11,0x10] al.ub[0x1] ah.ub[0x0] : => al.ub[0x7] ah.ub[0x01] eflags[0x11,0x11]
13 ###aas eflags[0x11,0x01] al.ub[0x1] ah.ub[0x2] : => al.ub[0x1] ah.ub[0x02] eflags[0x11,0x00]
17 ###aas eflags[0x11,0x10] al.ub[0x1] ah.ub[0x2] : => al.ub[0xb] ah.ub[0x00] eflags[0x11,0x11]
21 adcb eflags[0x1,0x0] : imm8[12] al.ub[34] => 1.ub[46]
22 adcb eflags[0x1,0x1] : imm8[12] al.ub[34] => 1.ub[47]
23 adcb eflags[0x1,0x0] : imm8[12] bl.ub[34] => 1.ub[46]
24 adcb eflags[0x1,0x1] : imm8[12] bl.ub[34] => 1.ub[47]
25 adcb eflags[0x1,0x0] : imm8[12] m8.ub[34] => 1.ub[46]
26 adcb eflags[0x1,0x1] : imm8[12] m8.ub[34] => 1.ub[47]
27 adcb eflags[0x1,0x0] : r8.ub[12] r8.ub[34] => 1.ub[46]
28 adcb eflags[0x1,0x1] : r8.ub[12] r8.ub[34] => 1.ub[47]
29 adcb eflags[0x1,0x0] : r8.ub[12] m8.ub[34] => 1.ub[46]
30 adcb eflags[0x1,0x1] : r8.ub[12] m8.ub[34] => 1.ub[47]
31 adcb eflags[0x1,0x0] : m8.ub[12] r8.ub[34] => 1.ub[46]
32 adcb eflags[0x1,0x1] : m8.ub[12] r8.ub[34] => 1.ub[47]
33 adcw eflags[0x1,0x0] : imm8[12] r16.uw[3456] => 1.uw[3468]
34 adcw eflags[0x1,0x1] : imm8[12] r16.uw[3456] => 1.uw[3469]
35 adcw eflags[0x1,0x0] : imm16[1234] ax.uw[5678] => 1.uw[6912]
36 adcw eflags[0x1,0x1] : imm16[1234] ax.uw[5678] => 1.uw[6913]
37 adcw eflags[0x1,0x0] : imm16[1234] bx.uw[5678] => 1.uw[6912]
38 adcw eflags[0x1,0x1] : imm16[1234] bx.uw[5678] => 1.uw[6913]
39 adcw eflags[0x1,0x0] : imm16[1234] m16.uw[5678] => 1.uw[6912]
40 adcw eflags[0x1,0x1] : imm16[1234] m16.uw[5678] => 1.uw[6913]
41 adcw eflags[0x1,0x0] : r16.uw[1234] r16.uw[5678] => 1.uw[6912]
42 adcw eflags[0x1,0x1] : r16.uw[1234] r16.uw[5678] => 1.uw[6913]
43 adcw eflags[0x1,0x0] : r16.uw[1234] m16.uw[5678] => 1.uw[6912]
44 adcw eflags[0x1,0x1] : r16.uw[1234] m16.uw[5678] => 1.uw[6913]
45 adcw eflags[0x1,0x0] : m16.uw[1234] r16.uw[5678] => 1.uw[6912]
46 adcw eflags[0x1,0x1] : m16.uw[1234] r16.uw[5678] => 1.uw[6913]
47 adcl eflags[0x1,0x0] : imm8[12] r32.ud[87654321] => 1.ud[87654333]
48 adcl eflags[0x1,0x1] : imm8[12] r32.ud[87654321] => 1.ud[87654334]
49 adcl eflags[0x1,0x0] : imm32[12345678] eax.ud[87654321] => 1.ud[99999999]
50 adcl eflags[0x1,0x1] : imm32[12345678] eax.ud[87654321] => 1.ud[100000000]
51 adcl eflags[0x1,0x0] : imm32[12345678] ebx.ud[87654321] => 1.ud[99999999]
52 adcl eflags[0x1,0x1] : imm32[12345678] ebx.ud[87654321] => 1.ud[100000000]
53 adcl eflags[0x1,0x0] : imm32[12345678] m32.ud[87654321] => 1.ud[99999999]
54 adcl eflags[0x1,0x1] : imm32[12345678] m32.ud[87654321] => 1.ud[100000000]
55 adcl eflags[0x1,0x0] : r32.ud[12345678] r32.ud[87654321] => 1.ud[99999999]
56 adcl eflags[0x1,0x1] : r32.ud[12345678] r32.ud[87654321] => 1.ud[100000000]
57 adcl eflags[0x1,0x0] : r32.ud[12345678] m32.ud[87654321] => 1.ud[99999999]
58 adcl eflags[0x1,0x1] : r32.ud[12345678] m32.ud[87654321] => 1.ud[100000000]
59 adcl eflags[0x1,0x0] : m32.ud[12345678] r32.ud[87654321] => 1.ud[99999999]
60 adcl eflags[0x1,0x1] : m32.ud[12345678] r32.ud[87654321] => 1.ud[100000000]
536 rclb eflags[0x1,0x0] : r8.ub[0xca] => 0.ub[0x94] eflags[0x1,0x1]
537 rclb eflags[0x1,0x0] : m8.ub[0xca] => 0.ub[0x94] eflags[0x1,0x1]
538 rclb eflags[0x1,0x0] : imm8[2] r8.ub[0xca] => 1.ub[0x29] eflags[0x1,0x1]
539 rclb eflags[0x1,0x0] : imm8[2] m8.ub[0xca] => 1.ub[0x29] eflags[0x1,0x1]
540 rclb eflags[0x1,0x0] : cl.ub[2] r8.ub[0xca] => 1.ub[0x29] eflags[0x1,0x1]
541 rclb eflags[0x1,0x0] : cl.ub[2] m8.ub[0xca] => 1.ub[0x29] eflags[0x1,0x1]
542 rclw eflags[0x1,0x0] : r16.uw[0xf0ca] => 0.uw[0xe194] eflags[0x1,0x1]
543 rclw eflags[0x1,0x0] : m16.uw[0xf0ca] => 0.uw[0xe194] eflags[0x1,0x1]
544 rclw eflags[0x1,0x0] : imm8[4] r16.uw[0xf0ca] => 1.uw[0x0ca7] eflags[0x1,0x1]
545 rclw eflags[0x1,0x0] : imm8[4] m16.uw[0xf0ca] => 1.uw[0x0ca7] eflags[0x1,0x1]
546 rclw eflags[0x1,0x0] : cl.ub[4] r16.uw[0xf0ca] => 1.uw[0x0ca7] eflags[0x1,0x1]
547 rclw eflags[0x1,0x0] : cl.ub[4] m16.uw[0xf0ca] => 1.uw[0x0ca7] eflags[0x1,0x1]
548 rcll eflags[0x1,0x0] : r32.ud[0xff00f0ca] => 0.ud[0xfe01e194] eflags[0x1,0x1]
549 rcll eflags[0x1,0x0] : m32.ud[0xff00f0ca] => 0.ud[0xfe01e194] eflags[0x1,0x1]
550 rcll eflags[0x1,0x0] : imm8[8] r32.ud[0xff00f0ca] => 1.ud[0x00f0ca7f] eflags[0x1,0x1]
551 rcll eflags[0x1,0x0] : imm8[8] m32.ud[0xff00f0ca] => 1.ud[0x00f0ca7f] eflags[0x1,0x1]
552 rcll eflags[0x1,0x0] : cl.ub[8] r32.ud[0xff00f0ca] => 1.ud[0x00f0ca7f] eflags[0x1,0x1]
553 rcll eflags[0x1,0x0] : cl.ub[8] m32.ud[0xff00f0ca] => 1.ud[0x00f0ca7f] eflags[0x1,0x1]
554 rcrb eflags[0x1,0x1] : r8.ub[0xca] => 0.ub[0xe5] eflags[0x1,0x0]
555 rcrb eflags[0x1,0x1] : m8.ub[0xca] => 0.ub[0xe5] eflags[0x1,0x0]
556 rcrb eflags[0x1,0x0] : imm8[2] r8.ub[0xca] => 1.ub[0x32] eflags[0x1,0x1]
557 rcrb eflags[0x1,0x0] : imm8[2] m8.ub[0xca] => 1.ub[0x32] eflags[0x1,0x1]
558 rcrb eflags[0x1,0x0] : cl.ub[2] r8.ub[0xca] => 1.ub[0x32] eflags[0x1,0x1]
559 rcrb eflags[0x1,0x0] : cl.ub[2] m8.ub[0xca] => 1.ub[0x32] eflags[0x1,0x1]
560 rcrw eflags[0x1,0x1] : r16.uw[0xf0ca] => 0.uw[0xf865] eflags[0x1,0x0]
561 rcrw eflags[0x1,0x1] : m16.uw[0xf0ca] => 0.uw[0xf865] eflags[0x1,0x0]
562 rcrw eflags[0x1,0x0] : imm8[4] r16.uw[0xf0ca] => 1.uw[0x4f0c] eflags[0x1,0x1]
563 rcrw eflags[0x1,0x0] : imm8[4] m16.uw[0xf0ca] => 1.uw[0x4f0c] eflags[0x1,0x1]
564 rcrw eflags[0x1,0x0] : cl.ub[4] r16.uw[0xf0ca] => 1.uw[0x4f0c] eflags[0x1,0x1]
565 rcrw eflags[0x1,0x0] : cl.ub[4] m16.uw[0xf0ca] => 1.uw[0x4f0c] eflags[0x1,0x1]
566 rcrl eflags[0x1,0x1] : r32.ud[0xff00f0ca] => 0.ud[0xff807865] eflags[0x1,0x0]
567 rcrl eflags[0x1,0x1] : m32.ud[0xff00f0ca] => 0.ud[0xff807865] eflags[0x1,0x0]
568 rcrl eflags[0x1,0x0] : imm8[8] r32.ud[0xff00f0ca] => 1.ud[0x94ff00f0] eflags[0x1,0x1]
569 rcrl eflags[0x1,0x0] : imm8[8] m32.ud[0xff00f0ca] => 1.ud[0x94ff00f0] eflags[0x1,0x1]
570 rcrl eflags[0x1,0x0] : cl.ub[8] r32.ud[0xff00f0ca] => 1.ud[0x94ff00f0] eflags[0x1,0x1]
571 rcrl eflags[0x1,0x0] : cl.ub[8] m32.ud[0xff00f0ca] => 1.ud[0x94ff00f0] eflags[0x1,0x1]
646 sbbb eflags[0x1,0x0] : imm8[12] al.ub[34] => 1.ub[22]
647 sbbb eflags[0x1,0x1] : imm8[12] al.ub[34] => 1.ub[21]
648 sbbb eflags[0x1,0x0] : imm8[12] bl.ub[34] => 1.ub[22]
649 sbbb eflags[0x1,0x1] : imm8[12] bl.ub[34] => 1.ub[21]
650 sbbb eflags[0x1,0x0] : imm8[12] m8.ub[34] => 1.ub[22]
651 sbbb eflags[0x1,0x1] : imm8[12] m8.ub[34] => 1.ub[21]
652 sbbb eflags[0x1,0x0] : r8.ub[12] r8.ub[34] => 1.ub[22]
653 sbbb eflags[0x1,0x1] : r8.ub[12] r8.ub[34] => 1.ub[21]
654 sbbb eflags[0x1,0x0] : r8.ub[12] m8.ub[34] => 1.ub[22]
655 sbbb eflags[0x1,0x1] : r8.ub[12] m8.ub[34] => 1.ub[21]
656 sbbb eflags[0x1,0x0] : m8.ub[12] r8.ub[34] => 1.ub[22]
657 sbbb eflags[0x1,0x1] : m8.ub[12] r8.ub[34] => 1.ub[21]
658 sbbw eflags[0x1,0x0] : imm8[12] r16.uw[3456] => 1.uw[3444]
659 sbbw eflags[0x1,0x1] : imm8[12] r16.uw[3456] => 1.uw[3443]
660 sbbw eflags[0x1,0x0] : imm16[1234] ax.uw[5678] => 1.uw[4444]
661 sbbw eflags[0x1,0x1] : imm16[1234] ax.uw[5678] => 1.uw[4443]
662 sbbw eflags[0x1,0x0] : imm16[1234] bx.uw[5678] => 1.uw[4444]
663 sbbw eflags[0x1,0x1] : imm16[1234] bx.uw[5678] => 1.uw[4443]
664 sbbw eflags[0x1,0x0] : imm16[1234] m16.uw[5678] => 1.uw[4444]
665 sbbw eflags[0x1,0x1] : imm16[1234] m16.uw[5678] => 1.uw[4443]
666 sbbw eflags[0x1,0x0] : r16.uw[1234] r16.uw[5678] => 1.uw[4444]
667 sbbw eflags[0x1,0x1] : r16.uw[1234] r16.uw[5678] => 1.uw[4443]
668 sbbw eflags[0x1,0x0] : r16.uw[1234] m16.uw[5678] => 1.uw[4444]
669 sbbw eflags[0x1,0x1] : r16.uw[1234] m16.uw[5678] => 1.uw[4443]
670 sbbw eflags[0x1,0x0] : m16.uw[1234] r16.uw[5678] => 1.uw[4444]
671 sbbw eflags[0x1,0x1] : m16.uw[1234] r16.uw[5678] => 1.uw[4443]
672 sbbl eflags[0x1,0x0] : imm8[12] r32.ud[87654321] => 1.ud[87654309]
673 sbbl eflags[0x1,0x1] : imm8[12] r32.ud[87654321] => 1.ud[87654308]
674 sbbl eflags[0x1,0x0] : imm32[12345678] eax.ud[87654321] => 1.ud[75308643]
675 sbbl eflags[0x1,0x1] : imm32[12345678] eax.ud[87654321] => 1.ud[75308642]
676 sbbl eflags[0x1,0x0] : imm32[12345678] ebx.ud[87654321] => 1.ud[75308643]
677 sbbl eflags[0x1,0x1] : imm32[12345678] ebx.ud[87654321] => 1.ud[75308642]
678 sbbl eflags[0x1,0x0] : imm32[12345678] m32.ud[87654321] => 1.ud[75308643]
679 sbbl eflags[0x1,0x1] : imm32[12345678] m32.ud[87654321] => 1.ud[75308642]
680 sbbl eflags[0x1,0x0] : r32.ud[12345678] r32.ud[87654321] => 1.ud[75308643]
681 sbbl eflags[0x1,0x1] : r32.ud[12345678] r32.ud[87654321] => 1.ud[75308642]
682 sbbl eflags[0x1,0x0] : r32.ud[12345678] m32.ud[87654321] => 1.ud[75308643]
683 sbbl eflags[0x1,0x1] : r32.ud[12345678] m32.ud[87654321] => 1.ud[75308642]
684 sbbl eflags[0x1,0x0] : m32.ud[12345678] r32.ud[87654321] => 1.ud[75308643]
685 sbbl eflags[0x1,0x1] : m32.ud[12345678] r32.ud[87654321] => 1.ud[75308642]
