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6729      expand to nontrivial sequences of insns).  With `-funswitch-loops'
7289 * Insns:: Expression types for entire insns.
7290 * Calls:: RTL representation of function call insns.
7424 `CALL_INSN'. *Note Insns::.
7427 An RTX code for something that matches in insns, such as
7438 `CLOBBER', etc.) and the non-insns that may appear on an insn
7468 debugging dumps. It is used for pointers to insns.
7521 *Note Insns::. Note that not all RTL objects linked onto an insn
7893 scheduling pass, for example, `use' insns before a `call_insn' may
7956 barrier. No other INSNs will be moved over it. Stored in the
8067 expression appears in insns. Expressions that appear more than
8658 (arguments pushed using push insns should always use
9235 `note' insns may separate them.
9699 insns with identical inputs to the `unspec', they will be
9712 carry a reg_equal note. These `use' insns will be deleted before
9718 These `use' insns will be deleted before the delayed branch
9756 assembly code output, can produce insns whose patterns consist of
9762 `NOTICE_UPDATE_CC', if any, must deal with such insns if you
9771 `(sequence [INSNS ...])'
9772 Represents a sequence of insns. Each of the INSNS that appears in
9773 the vector is suitable for appearing in the chain of insns, so it
9778 generation. It represents the sequence of insns that result from a
9779 `define_expand' _before_ those insns are passed to `emit_insn' to
9780 insert them in the chain of insns. When actually inserted, the
9781 individual sub-insns are separated out and the `sequence' is
9785 insns that reside in its delay slots are grouped together into a
9787 in the vector; subsequent insns are to be placed in the delay slot.
9791 annul the effect of the insns in the delay slots. In such a case,
9908 insns behave differently on different machines and hence must be treated
9955 File: gccint.info, Node: Debug Information, Next: Insns, Prev: Assembler, Up: RTL
9983 File: gccint.info, Node: Insns, Next: Calls, Prev: Debug Information, Up: RTL
9985 10.19 Insns
9989 chain of objects called "insns". Insns are expressions with special
9990 codes that are used for no other purpose. Some insns are actual
9996 id-number that distinguishes it from all other insns in the current
10000 `sequence'), and chain pointers to the preceding and following insns.
10018 delimited by these insns, the `NEXT_INSN' and `PREV_INSN' pointers must
10029 After delay slot scheduling, some of the insns in the chain might be
10030 `sequence' expressions, which contain a vector of insns. The value of
10031 `NEXT_INSN' in all but the last of these insns is the next insn in the
10036 This means that the above invariants are not necessarily true for insns
10048 always contained in insns with code `insn' even if one of those
10049 insns should jump or do function calls.
10051 Insns with code `insn' have four additional fields beyond the three
10062 `jump_insn' insns have the same extra fields as `insn' insns,
10074 Return insns count as jumps, but since they do not refer to any
10083 `call_insn' insns have the same extra fields as `insn' insns,
10151 `note' insns are used to represent additional debugging and
10167 compiler delete insns by altering them into notes of this
10268 `call_insn' insns:
10289 Matching is also never attempted on insns that result from an `asm'
10292 insns.
10302 jump nor a label may come between the related insns. These are
10315 operand. The significant thing about the chain is which insns appear
10322 analysis pass adds a link to insns which store into registers values
10338 they may create a linkage between two insns. There are also a set of
10370 The `REG_NONNEG' note is added to insns only if the machine
10389 have a `REG_LABEL_TARGET' note. *Note JUMP_LABEL: Insns.
10420 program; simple replacement may make some insns invalid.) For
10427 Although in this case the register may be set by other insns, it
10434 Although other insns may set the pseudo-register, it is valid for
10447 of insns such as a library call is used to perform an arithmetic
10474 These notes describe linkages between insns. They occur in pairs: one
10480 On machines that use `cc0', the insns which set and use `cc0' set
10514 These notes are found in JUMP insns after delayed branch scheduling
10534 File: gccint.info, Node: Calls, Next: Sharing, Prev: Insns, Up: RTL
10536 10.20 RTL Representation of Function-Call Insns
10539 Insns that call subroutines have the RTL expression code `call_insn'.
10540 These insns must satisfy special rules, and their bodies must use a
10572 for example to contain the return address. `call_insn' insns on these
10585 Insns containing just `use' expressions directly precede the
10588 `CALL_USED_REGISTERS' are clobbered by the called function, insns
10629 the insns in the function and assume that each time a `label_ref'
10648 unwanted side-effects on other insns.
16911 insns in the loop, on GIMPLE and on RTL.
17108 insns are scanned, so that this function can be called on the insn
17116 used in the specified insn or one of the following insns.
17868 use `NEXT_INSN' and `PREV_INSN' instead. *Note Insns::.
17977 * RTL Template:: The RTL template defines what insns match a pattern.
17988 * Jump Patterns:: Special considerations for patterns for jump insns.
17989 * Looping Patterns:: How to define patterns for special looping insns.
17991 * Expander Definitions::Generating a sequence of several RTL insns
17996 * Insn Attributes:: Specifying the value of attributes for generated insns.
18020 For the generate pass, only the names of the insns matter, from either
18032 new insns for the insn list, say via `emit_insn()', and invoke `DONE'.
18039 replace, and rearrange the insns in the insn list. This is where the
18069 insns to be combined later on.
18109 insns as assembler code. `%' in this string specifies where to
18115 5. Optionally, a vector containing the values of attributes for insns
18169 The RTL template is used to define which insns match the particular
18318 operands 1 and 2 of insns to see if it can do register tying.
19110 the reload pass of the compiler to generate additional insns to make
19249 insns that use the pseudo register, looking for the machine-dependent
19422 A memory reference suitable for VFP load/store insns
20377 Constants that can be used directly with boolean insns.
21476 pass. Even the reload pass can generate move insns to copy values
21490 insns and some temporary registers.
22600 initialization insns do not always need to be emitted, use a
22632 Definitions::) that produces the required insns. The three types
22654 or stack backchains. Place insns in these patterns to save
23073 that supports register-register add insns by examining the operands and
23084 `define_expand', which expands to all the required insns.
23098 Two separate insns are always used if the machine description
23104 Condition Code::) and so that the comparison and branch insns could be
23111 comparison of the given operands (with the branch insns coming in
23118 (1) `note' insns can separate them, though.
23167 combining two sequential insns together into an implicit parallel insn,
23319 cannot be handled with single insn, but a sequence of RTL insns can
23352 RTL insns directly by calling routines such as `emit_insn', etc.
23353 Any such insns precede the ones that come from the RTL template.
23360 The RTL template, in addition to controlling generation of RTL insns,
23388 only RTL insns resulting from the pattern on this occasion will be
23440 but fail in other cases where machine insns aren't available. When it
23460 Here two RTL insns are generated, one to clear the entire output operand
23500 into multiple insns. On machines that have instructions requiring
23504 be able to move insns into one-instruction delay slots. However, some
23505 insns may generate more than one machine instruction. These insns
23508 Often you can rewrite the single insn as a list of individual insns,
23511 more space. If the resulting insns are too complex, it may also
23516 The insn combiner phase also splits putative insns. If three insns are
23519 complex pattern into two insns that are recognized. Usually it can
23522 addition of a large constant in two insns on a RISC machine, the way to
23523 split the addition into two insns is machine-dependent.
23526 complex insn into several simpler insns. It looks like this:
23539 in the insn list with the insns given by NEW-INSN-PATTERN-1,
23545 code or emit some insns whose pattern is not fixed. Unlike those in
23556 insns that are matched by some `define_insn' and, if `reload_completed'
23561 `SImode' into a pair of shift insns:
23585 produce insns that match).
23642 some insns that match some `define_insn' as well as some insns that
23644 the insns that are valid and one for the insns that are not valid.
23776 example, sometimes two consecutive insns related in purpose can be
23783 insns and substitute assembly text. Use of `define_peephole' is
23786 A newer `define_peephole2' matches insns and substitutes new insns.
23817 consecutive insns. The optimization applies to a sequence of insns when
23821 Each of the insns matched by a peephole must also match a
23828 The operands of the insns are matched with `match_operands',
23831 So, you can check for identical operands in two insns by using
23844 Once a sequence of insns matches the patterns, the CONDITION is
23848 optimization is applied to every sequence of insns that matches the
23858 ...)'). Use the variable `insn' to refer to the last of the insns
23859 being matched; use `prev_active_insn' to find the preceding insns.
23868 Applying the optimization means replacing the sequence of insns with
23872 in matching the original sequence of insns.
23880 so the insns they produce are never combined or rearranged in any way.
24043 * Tagging Insns:: Assigning attribute values to insns.
24045 * Insn Lengths:: Computing the length of insns.
24068 attribute for insns that match patterns whose definition does not
24146 File: gccint.info, Node: Expressions, Next: Tagging Insns, Prev: Defining Attributes, Up: Insn Attributes
24163 specific instructions (*note Tagging Insns::).
24261 all insns matching a particular pattern. This is by far the most
24305 File: gccint.info, Node: Tagging Insns, Next: Attr Example, Prev: Expressions, Up: Insn Attributes
24307 16.19.3 Assigning Attribute Values to Insns
24314 insns. The value of any attribute not specified in a particular insn
24350 which case the attribute will assume its default value for insns
24378 the attributes assigned to insns produced from an `asm' statement. It
24399 File: gccint.info, Node: Attr Example, Next: Insn Lengths, Prev: Tagging Insns, Up: Insn Attributes
24405 insn attributes. Typically, insns are divided into "types" and an
24412 can divide all insns into loads, stores, (integer) arithmetic
24478 For normal insns, the length will be determined by value of the
24591 DELAY-N. ANNUL-TRUE-N is an attribute test that specifies which insns
24593 specifies which insns in the delay slot may be annulled if the branch
24597 For example, in the common case where branch and call insns require a
24742 the producing and consuming insns (if the difference is negative, the
24753 CONDITION defines what RTL insns are described by this construction.
24809 Sometimes unit reservations for different insns contain common parts.
24833 two insns as parameters. If the function returns zero the bypass will
24838 If there are more one bypass with the same output and input insns, the
24866 can execute simultaneously only single floating point insns or only
24867 double floating point insns.
24954 of them may be rejected by reservations in the subsequent insns.
24964 three insns (two integer insns and one floating point insn) on the
24965 cycle but can finish only two insns. To describe this, we define the
24971 All simple integer insns can be executed in any integer pipeline and
24972 their result is ready in two cycles. The simple integer insns are
24975 multiplication insns can be executed only in the second integer
24979 finished. Floating point insns are fully pipelined and their results
25056 expressions. That is, the default and all uses in the insns must be a
25517 * Condition Code:: Defining how insns update the condition code.
25522 * Assembler Format:: Defining how to write insns and pseudo-ops to output.
26590 and `extzv' insns that can directly reference memory.
26776 on rtl that are not actually in any insns yet, but will be later.
28491 This target hook allows the backend to emit frame-related insns
28493 debugging info engine will invoke it on insns of the form
29044 A C expression. If nonzero, push insns will be used to pass
29483 insns involving scalar mode MODE. For a scalar mode to be
29495 insns involving vector mode MODE. At the very least, it must have
29508 arbitrary insns. Typically, these machines have instructions that
29956 Also, other insns may (at least in principle) be considered for
29959 The insns accepted to fill the epilogue delay slots are put in an
29964 outputting the insns in this list, usually by calling
30952 adjacent insns for machines using `(cc0)'. This can prevent important
31010 macro's responsibility to recognize insns that set the condition
31016 If there are insns that do not set the condition code but do alter
31019 reflecting. For example, on the 68000, insns that store in address
31021 `NOTICE_UPDATE_CC' can leave `cc_status' unaltered for such insns.
31030 the results of peephole optimization: insns whose patterns are
31032 are just the operands. The RTL structure of these insns is not
31033 sufficient to indicate what the insns actually do. What
31340 The threshold of number of scalar memory-to-memory move insns,
31341 _below_ which a sequence of insns should be generated instead of a
31347 `define_expand' that emits a sequence of insns, this macro counts
31367 The threshold of number of scalar move insns, _below_ which a
31368 sequence of insns should be generated to clear memory instead of a
31385 The threshold of number of scalar move insns, _below_ which a
31386 sequence of insns should be generated to set memory to a constant
31539 additional constraint to issue insns on the same simulated
31548 insn from the ready list. It should return the number of insns
31550 `MORE - 1' for insns other than `CLOBBER' and `USE', which
31552 define this hook if some insns take more machine resources than
31553 others, so that fewer insns can follow them in the same cycle.
31569 times of the first and the second insns. If these values are not
31579 scheduling priorities of insns.
31594 number of ready insns. The return value is the number of insns
31604 and return the number of insns to be scheduled in the same cycle.
31606 where scheduling one insn causes other insns to become ready in
31607 the same cycle. These other insns can then be taken into account
31612 This hook is called after evaluation forward dependencies of insns
31614 correspondingly) but before insns scheduling of the insn chain.
31626 MAX_READY is the maximum number of insns in the current scheduling
31696 ()' subsequent ready insns to choose an insn whose issue will
31697 result in maximal number of issued insns on the same cycle. For
31699 packing simple insns into the VLIW insn. Of course, if the rules
31704 insns can be executed in pipelines A or B, some insns can be
31709 first, the processor could issue all 3 insns per cycle.
31719 This hook controls what insns from the ready insn queue will be
31723 The default is that any ready insns can be chosen to be issued.
31771 schedule the insns that are involved in the dependence too close
31776 in cycles between the two insns. The hook returns `true' if
31777 considering the distance between the two insns the dependence
31786 targets one may want to allow issuing dependent insns closer to
31859 cancel data speculative insns when the ALAT table is nearly full.
32039 tables (for `tablejump' insns) should be output in the text
34338 `RTX_FRAME_RELATED_P' on the prologue insns if you use RTL for the
34634 Generate one or more insns to set ENTITY to MODE. HARD_REG_LIVE
35194 Define this macro to be a C expression indicating when insns that
43844 * alternate entry points: Insns. (line 140)
43898 * asm_noperands: Insns. (line 307)
43960 * assigning attribute values to insns: Tagging Insns. (line 6)
43963 * attr <1>: Tagging Insns. (line 54)
43985 * barrier: Insns. (line 160)
44099 * call_insn: Insns. (line 95)
44108 * CALL_INSN_FUNCTION_USAGE: Insns. (line 101)
44200 * code_label: Insns. (line 119)
44203 * CODE_LABEL_NUMBER: Insns. (line 119)
44404 * debug_insn: Insns. (line 239)
44481 * define_asm_attributes: Tagging Insns. (line 73)
44676 * expr_list: Insns. (line 545)
44810 * function-call insns: Calls. (line 6)
44847 * generating insns: RTL Template. (line 6)
44858 * get_insns: Insns. (line 34)
44859 * get_last_insn: Insns. (line 34)
45377 * HImode, in insn: Insns. (line 272)
45463 * insn: Insns. (line 63)
45478 * INSN_CODE: Insns. (line 298)
45481 * insn_list: Insns. (line 545)
45484 * INSN_UID: Insns. (line 23)
45485 * INSN_VAR_LOCATION: Insns. (line 239)
45486 * insns: Insns. (line 6)
45487 * insns, generating: RTL Template. (line 6)
45488 * insns, recognizing: RTL Template. (line 6)
45554 * jump_insn: Insns. (line 73)
45559 * JUMP_LABEL: Insns. (line 80)
45564 * LABEL_ALT_ENTRY_P: Insns. (line 140)
45567 * LABEL_KIND: Insns. (line 140)
45568 * LABEL_NUSES: Insns. (line 136)
45646 * LOG_LINKS: Insns. (line 317)
45888 * NEXT_INSN: Insns. (line 30)
45925 * note: Insns. (line 168)
45929 * NOTE_INSN_BLOCK_BEG: Insns. (line 193)
45930 * NOTE_INSN_BLOCK_END: Insns. (line 193)
45931 * NOTE_INSN_DELETED: Insns. (line 183)
45932 * NOTE_INSN_DELETED_LABEL: Insns. (line 188)
45933 * NOTE_INSN_EH_REGION_BEG: Insns. (line 199)
45934 * NOTE_INSN_EH_REGION_END: Insns. (line 199)
45935 * NOTE_INSN_FUNCTION_BEG: Insns. (line 223)
45936 * NOTE_INSN_LOOP_BEG: Insns. (line 207)
45937 * NOTE_INSN_LOOP_CONT: Insns. (line 213)
45938 * NOTE_INSN_LOOP_END: Insns. (line 207)
45939 * NOTE_INSN_LOOP_VTOP: Insns. (line 217)
45940 * NOTE_INSN_VAR_LOCATION: Insns. (line 227)
45941 * NOTE_LINE_NUMBER: Insns. (line 168)
45942 * NOTE_SOURCE_FILE: Insns. (line 168)
45943 * NOTE_VAR_LOCATION: Insns. (line 227)
46027 * PATTERN: Insns. (line 288)
46117 * PREV_INSN: Insns. (line 26)
46154 * PUT_REG_NOTE_KIND: Insns. (line 350)
46159 * QImode, in insn: Insns. (line 272)
46203 * recognizing insns: RTL Template. (line 6)
46224 * REG_BR_PRED: Insns. (line 531)
46225 * REG_BR_PROB: Insns. (line 525)
46230 * REG_CC_SETTER: Insns. (line 496)
46231 * REG_CC_USER: Insns. (line 496)
46237 * REG_CROSSING_JUMP: Insns. (line 409)
46238 * REG_DEAD: Insns. (line 361)
46241 * REG_DEP_ANTI: Insns. (line 518)
46242 * REG_DEP_OUTPUT: Insns. (line 514)
46243 * REG_DEP_TRUE: Insns. (line 511)
46245 * REG_EQUAL: Insns. (line 424)
46246 * REG_EQUIV: Insns. (line 424)
46248 * REG_FRAME_RELATED_EXPR: Insns. (line 537)
46250 * REG_INC: Insns. (line 377)
46252 * REG_LABEL_OPERAND: Insns. (line 391)
46253 * REG_LABEL_TARGET: Insns. (line 400)
46256 * REG_NONNEG: Insns. (line 383)
46257 * REG_NOTE_KIND: Insns. (line 350)
46258 * REG_NOTES: Insns. (line 324)
46265 * REG_SETJMP: Insns. (line 418)
46266 * REG_UNUSED: Insns. (line 370)
46373 * RTL function-call insns: Calls. (line 6)
46446 * set_attr: Tagging Insns. (line 31)
46447 * set_attr_alternative: Tagging Insns. (line 49)
46452 * SET_LABEL_KIND: Insns. (line 140)
46688 * tagging insns: Tagging Insns. (line 6)
47109 * TImode, in insn: Insns. (line 272)
47605 Node: Insns436858
47754 Node: Tagging Insns1025720