Lines Matching full:bitwise
4691 Target does not support vector bitwise instructions.
9119 Represents the bitwise complement of the value represented by X,
9123 Represents the bitwise logical-and of the values represented by X
9128 Represents the bitwise inclusive-or of the values represented by X
9133 Represents the bitwise exclusive-or of the values represented by X
11240 value should be returned, via bitwise copy, by the function. You
11263 initializer. The initializer should be evaluated, and a bitwise
11266 explicit statement later in the code; no bitwise copy is required.
11736 These nodes represent bitwise complement, and will always have
11835 These nodes represent bitwise inclusive or, bitwise exclusive or,
11836 and bitwise and, respectively. Both operands will always have
12096 and, if non-void, copied (bitwise) into the temporary. If the
22124 Store the bitwise-complement of operand 1 into operand 0.
23268 * De Morgan's Law is used to move bitwise negation inside a bitwise
23272 A machine that has an instruction that performs a bitwise
23273 logical-and of one operand with the bitwise negation of the other
23295 * The only possible RTL expressions involving both bitwise
23296 exclusive-or and bitwise negation are `(xor:M X Y)' and `(not:M
27644 Register classes used for input-operands of bitwise-and or shift
27650 bitwise-and or shift instruction must have a subclass consisting of
35257 certain bitwise `and' instructions that truncates the count of a
44017 * bitwise complement: Arithmetic. (line 154)
44018 * bitwise exclusive-or: Arithmetic. (line 168)
44019 * bitwise inclusive-or: Arithmetic. (line 163)
44020 * bitwise logical-and: Arithmetic. (line 158)
44220 * complement, bitwise: Arithmetic. (line 154)
44665 * exclusive-or, bitwise: Arithmetic. (line 168)
45433 * inclusive-or, bitwise: Arithmetic. (line 163)
45648 * logical-and, bitwise: Arithmetic. (line 158)
