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Lines Matching refs:__v4si

372   return (__m256i)__builtin_ia32_pmovsxdq256((__v4si)__V);
408 return (__m256i)__builtin_ia32_pmovzxdq256((__v4si)__V);
550 return (__m256i)__builtin_ia32_pslld256((__v8si)__a, (__v4si)__count);
586 return (__m256i)__builtin_ia32_psrad256((__v8si)__a, (__v4si)__count);
614 return (__m256i)__builtin_ia32_psrld256((__v8si)__a, (__v4si)__count);
764 (__m128i)__builtin_ia32_pblendd128((__v4si)__V1, (__v4si)__V2, (M)); })
786 return (__m256i)__builtin_ia32_pbroadcastd256((__v4si)__X);
811 return (__m128i)__builtin_ia32_pbroadcastd128((__v4si)__X);
873 return (__m128i)__builtin_ia32_maskloadd((const __v4si *)__X, (__v4si)__M);
897 __builtin_ia32_maskstored((__v4si *)__X, (__v4si)__M, (__v4si)__Y);
915 return (__m128i)__builtin_ia32_psllv4si((__v4si)__X, (__v4si)__Y);
939 return (__m128i)__builtin_ia32_psrav4si((__v4si)__X, (__v4si)__Y);
951 return (__m128i)__builtin_ia32_psrlv4si((__v4si)__X, (__v4si)__Y);
972 (__v4si)__i, (__v2df)__mask, (s)); })
980 (__v4si)__i, (__v4df)__mask, (s)); })
1004 (__v4si)__i, (__v4sf)__mask, (s)); })
1035 (__m128i)__builtin_ia32_gatherd_d((__v4si)__a, (const __v4si *)__m, \
1036 (__v4si)__i, (__v4si)__mask, (s)); })
1051 (__m128i)__builtin_ia32_gatherq_d((__v4si)__a, (const __v4si *)__m, \
1052 (__v2di)__i, (__v4si)__mask, (s)); })
1059 (__m128i)__builtin_ia32_gatherq_d256((__v4si)__a, (const __v4si *)__m, \
1060 (__v4di)__i, (__v4si)__mask, (s)); })
1068 (__v4si)__i, (__v2di)__mask, (s)); })
1076 (__v4si)__i, (__v4di)__mask, (s)); })
1098 (const __v2df *)__m, (__v4si)__i, \
1105 (const __v4df *)__m, (__v4si)__i, \
1126 (const __v4sf *)__m, (__v4si)__i, \
1153 (__m128i)__builtin_ia32_gatherd_d((__v4si)_mm_setzero_si128(), \
1154 (const __v4si *)__m, (__v4si)__i, \
1155 (__v4si)_mm_set1_epi32(-1), (s)); })
1167 (__m128i)__builtin_ia32_gatherq_d((__v4si)_mm_setzero_si128(), \
1168 (const __v4si *)__m, (__v2di)__i, \
1169 (__v4si)_mm_set1_epi32(-1), (s)); })
1174 (__m128i)__builtin_ia32_gatherq_d256((__v4si)_mm_setzero_si128(), \
1175 (const __v4si *)__m, (__v4di)__i, \
1176 (__v4si)_mm_set1_epi32(-1), (s)); })
1182 (const __v2di *)__m, (__v4si)__i, \
1189 (const __v4di *)__m, (__v4si)__i, \