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Searched
defs:MO2
(Results
1 - 8
of
8
) sorted by null
/external/llvm/lib/Target/Hexagon/
HexagonAsmPrinter.h
84
const MachineOperand &
MO2
= MI->getOperand(OpNo+1);
88
<< (int)
MO2
.getImm();
94
const MachineOperand &
MO2
= MI->getOperand(OpNo+1);
98
<<
MO2
.getImm();
HexagonAsmPrinter.cpp
256
const MachineOperand &
MO2
= MI->getOperand(OpNo+1);
260
<<
MO2
.getImm();
/external/llvm/lib/Target/ARM/InstPrinter/
ARMInstPrinter.cpp
105
const MCOperand &
MO2
= MI->getOperand(2);
118
printRegName(O,
MO2
.getReg());
128
const MCOperand &
MO2
= MI->getOperand(2);
130
O << '\t' << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(
MO2
.getImm()));
139
if (ARM_AM::getSORegShOp(
MO2
.getImm()) == ARM_AM::rrx) {
146
<< "#" << translateShiftImm(ARM_AM::getSORegOffset(
MO2
.getImm()))
342
const MCOperand &
MO2
= MI->getOperand(OpNum+1);
354
printRegName(O,
MO2
.getReg());
361
const MCOperand &
MO2
= MI->getOperand(OpNum+1);
366
printRegImmShift(O, ARM_AM::getSORegShOp(
MO2
.getImm())
[
all
...]
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
R600InstrInfo.cpp
424
MachineOperand &
MO2
= Cond[2];
425
switch (
MO2
.getReg()) {
427
MO2
.setReg(AMDGPU::PRED_SEL_ONE);
430
MO2
.setReg(AMDGPU::PRED_SEL_ZERO);
/external/mesa3d/src/gallium/drivers/radeon/
R600InstrInfo.cpp
424
MachineOperand &
MO2
= Cond[2];
425
switch (
MO2
.getReg()) {
427
MO2
.setReg(AMDGPU::PRED_SEL_ONE);
430
MO2
.setReg(AMDGPU::PRED_SEL_ZERO);
/external/llvm/lib/Target/ARM/MCTargetDesc/
ARMMCCodeEmitter.cpp
739
const MCOperand &
MO2
= MI.getOperand(OpIdx + 1);
741
unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(
MO2
.getReg());
[
all
...]
/external/llvm/lib/Target/ARM/
ARMAsmPrinter.cpp
[
all
...]
ARMCodeEmitter.cpp
[
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...]
Completed in 905 milliseconds