/external/llvm/lib/Target/AArch64/InstPrinter/ |
AArch64InstPrinter.h | 40 void printAddrRegExtendOperand(const MCInst *MI, unsigned OpNum, 42 printAddrRegExtendOperand(MI, OpNum, O, MemSize, RmSize); 46 void printAddrRegExtendOperand(const MCInst *MI, unsigned OpNum, 51 unsigned OpNum, raw_ostream &O); 53 unsigned OpNum, raw_ostream &O); 55 void printBareImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 58 void printBFILSBOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 59 void printBFIWidthOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 60 void printBFXWidthOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 63 void printCondCodeOperand(const MCInst *MI, unsigned OpNum, [all...] |
/external/llvm/utils/PerfectShuffle/ |
PerfectShuffle.cpp | 106 unsigned short OpNum; 110 Operator(unsigned short shufflemask, const char *name, unsigned opnum, 112 : ShuffleMask(shufflemask), OpNum(opnum), Name(name), Cost(cost) { 303 for (unsigned opnum = 0, e = TheOperators.size(); opnum != e; ++opnum) { 304 Operator *Op = TheOperators[opnum]; 394 unsigned OpNum = ShufTab[i].Op ? ShufTab[i].Op->OpNum : 0 [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCAsmPrinter.cpp | 715 unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1; 716 const MachineOperand &MO = MI->getOperand(OpNum); [all...] |
PPCISelLowering.cpp | [all...] |
/external/llvm/lib/Target/ARM/ |
Thumb2SizeReduction.cpp | 378 unsigned OpNum = 3; // First 'rest' of operands. 416 OpNum = 4; 437 OpNum = 0; 446 OpNum = 2; 454 OpNum = 0; 461 OpNum = 2; 511 for (unsigned e = MI->getNumOperands(); OpNum != e; ++OpNum) 512 MIB.addOperand(MI->getOperand(OpNum)); [all...] |
ARMAsmPrinter.cpp | 324 void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum, 326 const MachineOperand &MO = MI->getOperand(OpNum); 406 bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, 416 return AsmPrinter::PrintAsmOperand(MI, OpNum, AsmVariant, ExtraCode, O); 418 if (MI->getOperand(OpNum).isReg()) { 420 << ARMInstPrinter::getRegisterName(MI->getOperand(OpNum).getReg()) 426 if (!MI->getOperand(OpNum).isImm()) 428 O << MI->getOperand(OpNum).getImm(); 432 printOperand(MI, OpNum, O); 435 if (MI->getOperand(OpNum).isReg()) [all...] |
ARMISelLowering.cpp | [all...] |
/external/llvm/lib/Target/SystemZ/ |
SystemZInstrInfo.cpp | 548 unsigned OpNum = Ops[0]; 550 .getRegClass(MI->getOperand(OpNum).getReg())->getSize() && 559 if (OpNum == 0) { 567 if (OpNum == 1) { 584 if (OpNum == 0 && MI->hasOneMemOperand()) { 609 if (OpNum == NumOps - 1) { 616 for (unsigned I = 0; I < OpNum; ++I)
|
/external/llvm/lib/Bitcode/Reader/ |
BitcodeReader.cpp | [all...] |
/external/llvm/lib/Target/X86/ |
X86InstrInfo.cpp | [all...] |
/frameworks/compile/libbcc/bcinfo/BitReader_2_7/ |
BitcodeReader.cpp | [all...] |
/frameworks/compile/libbcc/bcinfo/BitReader_3_0/ |
BitcodeReader.cpp | [all...] |