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Searched
defs:SETCC
(Results
1 - 6
of
6
) sorted by null
/external/llvm/lib/Target/MSP430/
MSP430ISelLowering.h
50
///
SetCC
- Operand 0 is condition code, and operand 1 is the flag
52
SETCC
,
/external/llvm/lib/Target/AArch64/
AArch64ISelLowering.h
70
/// which will be produced by a
setcc
instruction.
73
/// This serves most of the functions of the LLVM
SETCC
instruction, for two
81
SETCC
,
/external/llvm/lib/Target/Hexagon/
HexagonISelLowering.h
32
SETCC
,
/external/llvm/include/llvm/CodeGen/
ISDOpcodes.h
320
/// Much like the scalar select and
setcc
, each bit in the condition selects
333
///
SetCC
operator - This evaluates to a true value iff the condition is
339
SETCC
,
490
/// compare, rather than as a combined
SetCC
node. The operands in order
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/external/llvm/lib/Target/X86/
X86ISelLowering.h
93
/// X86
SetCC
. Operand 0 is condition code, and operand 1 is the EFLAGS
95
SETCC
,
97
// Same as
SETCC
except it's materialized with a sbb and the value is all
101
/// X86 FP
SETCC
, implemented with CMP{cc}SS/CMP{cc}SD.
595
/// getSetCCResultType - Return the value type to use for ISD::
SETCC
.
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/external/llvm/lib/CodeGen/SelectionDAG/
DAGCombiner.cpp
549
// isSetCCEquivalent - Return true if this node is a
setcc
, or is a select_cc
550
// that selects between the values 1 and 0, making it equivalent to a
setcc
.
556
if (N.getOpcode() == ISD::
SETCC
) {
575
// isOneUseSetCC - Return true if this is a
SetCC
-equivalent operation with only
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