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    Searched defs:Src0 (Results 1 - 4 of 4) sorted by null

  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
R600ExpandSpecialInstrs.cpp 97 unsigned Src0 = MI.getOperand(1).getReg();
106 Src0 = TRI.getSubReg(Src0, SubRegIndex);
112 Src1 = TRI.getSubReg(Src0, SubRegIndex1);
113 Src0 = TRI.getSubReg(Src0, SubRegIndex0);
152 .addReg(Src0)
  /external/mesa3d/src/gallium/drivers/radeon/
R600ExpandSpecialInstrs.cpp 97 unsigned Src0 = MI.getOperand(1).getReg();
106 Src0 = TRI.getSubReg(Src0, SubRegIndex);
112 Src1 = TRI.getSubReg(Src0, SubRegIndex1);
113 Src0 = TRI.getSubReg(Src0, SubRegIndex0);
152 .addReg(Src0)
  /external/llvm/lib/Target/R600/
R600ExpandSpecialInstrs.cpp 81 MI.getOperand(1).getReg(), // src0
195 unsigned Src0 = BMI->getOperand(
196 TII->getOperandIdx(Opcode, AMDGPU::OpName::src0))
201 (void) Src0;
203 if ((TRI.getEncodingValue(Src0) & 0xff) < 127 &&
205 assert(TRI.getHWRegChan(Src0) == TRI.getHWRegChan(Src1));
247 unsigned Src0 = MI.getOperand(
248 TII->getOperandIdx(MI, AMDGPU::OpName::src0)).getReg();
260 Src0 = TRI.getSubReg(Src0, SubRegIndex)
    [all...]
  /external/llvm/lib/CodeGen/SelectionDAG/
LegalizeVectorTypes.cpp     [all...]

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