| /external/llvm/unittests/IR/ |
| IRBuilderTest.cpp | 81 BasicBlock *TBB = BasicBlock::Create(getGlobalContext(), "", F);
84 BranchInst *BI = Builder.CreateCondBr(Builder.getTrue(), TBB, FBB);
88 EXPECT_EQ(TBB, TI->getSuccessor(0));
93 BI = Builder.CreateCondBr(Builder.getTrue(), TBB, FBB, Weights);
97 EXPECT_EQ(TBB, TI->getSuccessor(0));
|
| /external/llvm/lib/CodeGen/ |
| EarlyIfConversion.cpp | 71 // | [TF]BB FBB TBB
76 // Instructions in the conditional blocks TBB and/or FBB are spliced into the
93 MachineBasicBlock *TBB;
98 /// isTriangle - When there is no 'else' block, either TBB or FBB will be
100 bool isTriangle() const { return TBB == Tail || FBB == Tail; }
103 MachineBasicBlock *getTPred() const { return TBB == Tail ? Head : TBB; }
135 /// Insertion point in Head for speculatively executed instructions form TBB
341 TBB = FBB = Tail = 0;
388 if (TII->AnalyzeBranch(*Head, TBB, FBB, Cond))
[all...] |
| MachineBasicBlock.cpp | 391 MachineBasicBlock *TBB = 0, *FBB = 0;
394 bool B = TII->AnalyzeBranch(*this, TBB, FBB, Cond);
398 if (TBB) {
401 if (isLayoutSuccessor(TBB))
410 assert(!TBB && "Found more than one non-landing-pad successor!");
411 TBB = *SI;
416 if (!TBB)
421 if (!isLayoutSuccessor(TBB))
422 TII->InsertBranch(*this, TBB, 0, Cond, dl);
429 if (isLayoutSuccessor(TBB)) {
[all...] |
| MachineBlockPlacement.cpp | [all...] |
| BranchFolding.cpp | 197 MachineBasicBlock *MBB = I, *TBB = 0, *FBB = 0;
199 if (!TII->AnalyzeBranch(*MBB, TBB, FBB, Cond, true))
200 MadeChange |= MBB->CorrectExtraCFGEdges(TBB, FBB, !Cond.empty());
462 MachineBasicBlock *TBB = 0, *FBB = 0;
466 !TII->AnalyzeBranch(*CurMBB, TBB, FBB, Cond, true)) {
468 if (TBB == NextBB && !Cond.empty() && !FBB) {
[all...] |
| IfConversion.cpp | 83 /// TargetInstrInfo::AnalyzeBranch() (i.e. TBB, FBB, and Cond), and its
216 bool MeetIfcvtSizeLimit(MachineBasicBlock &TBB,
222 TII->isProfitableToIfCvt(TBB, TCycle, TExtra, FBB, FCycle, FExtra,
816 // TBB FBB
833 // | TBB
856 // | TBB---> exit
[all...] |
| MachineLICM.cpp | 804 MachineBasicBlock *TBB = 0, *FBB = 0;
806 if (!TII->AnalyzeBranch(*BB, TBB, FBB, Cond, false) && Cond.empty())
[all...] |
| MachineVerifier.cpp | 548 MachineBasicBlock *TBB = 0, *FBB = 0;
551 TBB, FBB, Cond)) {
554 if (!TBB && !FBB) {
582 } else if (TBB && !FBB && Cond.empty()) {
587 } else if (!MBB->isSuccessor(TBB)) {
601 } else if (TBB && !FBB && !Cond.empty()) {
609 if (&*MBBI != TBB)
612 else if (TBB != *MBB->succ_begin())
618 } else if (!matchPair(MBB->succ_begin(), TBB, MBBI)) {
632 } else if (TBB && FBB)
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | 761 // bposge32 $tbb
765 // $tbb:
768 // $vr0 = phi($vr2, $fbb, $vr1, $tbb)
778 MachineBasicBlock *TBB = F->CreateMachineBasicBlock(LLVM_BB);
781 F->insert(It, TBB);
791 BB->addSuccessor(TBB);
793 TBB->addSuccessor(Sink);
796 BuildMI(BB, DL, TII->get(Mips::BPOSGE32)).addMBB(TBB);
804 // Fill $TBB.
806 BuildMI(*TBB, TBB->end(), DL, TII->get(Mips::ADDiu), VR1
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMFastISel.cpp | [all...] |
