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    Searched defs:UseMI (Results 1 - 13 of 13) sorted by null

  /external/llvm/lib/CodeGen/
DeadMachineInstructionElim.cpp 135 MachineInstr *UseMI = Use.getParent();
136 if (UseMI==MI)
139 UseMI->getOperand(0).setReg(0U);
OptimizePHIs.cpp 144 MachineInstr *UseMI = &*I;
145 if (!UseMI->isPHI() || !IsDeadPHICycle(UseMI, PHIsInCycle))
LiveRangeEdit.cpp 161 MachineInstr *DefMI = 0, *UseMI = 0;
175 if (UseMI && UseMI != MI)
180 UseMI = MI;
183 if (!DefMI || !UseMI)
190 LIS.getInstructionIndex(UseMI)))
194 // Assume there are stores between DefMI and UseMI.
200 << " into single use: " << *UseMI);
203 if (UseMI->readsWritesVirtualRegister(LI->reg, &Ops).second)
206 MachineInstr *FoldMI = TII.foldMemoryOperand(UseMI, Ops, DefMI)
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RegisterScavenging.cpp 281 /// longest after StargMII. UseMI is set to the instruction where the search
289 MachineBasicBlock::iterator &UseMI) {
347 UseMI = RestorePointMI;
386 MachineBasicBlock::iterator UseMI;
387 unsigned SReg = findSurvivorReg(I, Candidates, 25, UseMI);
412 if (!TRI->saveScavengerRegister(*MBB, I, UseMI, RC, SReg)) {
424 TII->loadRegFromStackSlot(*MBB, UseMI, SReg, Scavenged[SI].FrameIndex,
426 II = prior(UseMI);
432 Scavenged[SI].Restore = prior(UseMI);
MachineSSAUpdater.cpp 221 MachineInstr *UseMI = U.getParent();
223 if (UseMI->isPHI()) {
224 MachineBasicBlock *SourceBB = findCorrespondingPred(UseMI, &U);
227 NewVR = GetValueInMiddleOfBlock(UseMI->getParent());
PeepholeOptimizer.cpp 196 MachineInstr *UseMI = &*UI;
197 if (UseMI == MI)
200 if (UseMI->isPHI()) {
226 if (UseMI->getOpcode() == TargetOpcode::SUBREG_TO_REG)
229 MachineBasicBlock *UseMBB = UseMI->getParent();
232 if (!LocalMIs.count(UseMI))
272 MachineInstr *UseMI = UseMO->getParent();
273 MachineBasicBlock *UseMBB = UseMI->getParent();
284 MachineInstr *Copy = BuildMI(*UseMBB, UseMI, UseMI->getDebugLoc()
    [all...]
RegAllocFast.cpp 590 const MachineInstr &UseMI = *MRI->use_nodbg_begin(VirtReg);
592 if (UseMI.isCopyLike())
593 Hint = UseMI.getOperand(0).getReg();
    [all...]
TailDuplication.cpp 256 MachineInstr *UseMI = &*UI;
258 if (UseMI->isDebugValue()) {
263 UseMI->eraseFromParent();
266 if (UseMI->getParent() == DefBB && !UseMI->isPHI())
333 MachineInstr *UseMI = &*UI;
334 if (UseMI->isDebugValue())
336 if (UseMI->getParent() != BB)
    [all...]
MachineLICM.cpp     [all...]
RegisterCoalescer.cpp 630 MachineInstr *UseMI = &*UI;
631 SlotIndex UseIdx = LIS->getInstructionIndex(UseMI);
636 if (UseMI->isRegTiedToDefOperand(UI.getOperandNo()))
675 MachineInstr *UseMI = &*UI;
677 if (UseMI->isDebugValue()) {
683 SlotIndex UseIdx = LIS->getInstructionIndex(UseMI).getRegSlot(true);
693 if (UseMI == CopyMI)
695 if (!UseMI->isCopy())
697 if (UseMI->getOperand(0).getReg() != IntB.reg ||
698 UseMI->getOperand(0).getSubReg()
    [all...]
  /external/llvm/lib/Target/ARM/
MLxExpansionPass.cpp 123 MachineInstr *UseMI = &*MRI->use_nodbg_begin(Reg);
124 if (UseMI->getParent() != MBB)
127 while (UseMI->isCopy() || UseMI->isInsertSubreg()) {
128 Reg = UseMI->getOperand(0).getReg();
132 UseMI = &*MRI->use_nodbg_begin(Reg);
133 if (UseMI->getParent() != MBB)
  /external/llvm/lib/Target/PowerPC/
PPCInstrInfo.cpp 810 bool PPCInstrInfo::FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI,
826 const MCInstrDesc &UseMCID = UseMI->getDesc();
833 for (UseIdx = 0; UseIdx < UseMI->getNumOperands(); ++UseIdx)
834 if (UseMI->getOperand(UseIdx).isReg() &&
835 UseMI->getOperand(UseIdx).getReg() == Reg)
838 assert(UseIdx < UseMI->getNumOperands() && "Cannot find Reg in UseMI");
    [all...]
  /external/llvm/lib/Target/Hexagon/
HexagonHardwareLoops.cpp 926 MachineInstr *UseMI = Use.getParent();
929 if (MI != UseMI)
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