1 //===-- PPCAsmBackend.cpp - PPC Assembler Backend -------------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 #include "MCTargetDesc/PPCMCTargetDesc.h" 11 #include "MCTargetDesc/PPCFixupKinds.h" 12 #include "llvm/MC/MCAsmBackend.h" 13 #include "llvm/MC/MCELFObjectWriter.h" 14 #include "llvm/MC/MCFixupKindInfo.h" 15 #include "llvm/MC/MCMachObjectWriter.h" 16 #include "llvm/MC/MCObjectWriter.h" 17 #include "llvm/MC/MCSectionMachO.h" 18 #include "llvm/MC/MCValue.h" 19 #include "llvm/Object/MachOFormat.h" 20 #include "llvm/Support/ELF.h" 21 #include "llvm/Support/ErrorHandling.h" 22 #include "llvm/Support/TargetRegistry.h" 23 using namespace llvm; 24 25 static uint64_t adjustFixupValue(unsigned Kind, uint64_t Value) { 26 switch (Kind) { 27 default: 28 llvm_unreachable("Unknown fixup kind!"); 29 case FK_Data_1: 30 case FK_Data_2: 31 case FK_Data_4: 32 case FK_Data_8: 33 case PPC::fixup_ppc_nofixup: 34 return Value; 35 case PPC::fixup_ppc_brcond14: 36 case PPC::fixup_ppc_brcond14abs: 37 return Value & 0xfffc; 38 case PPC::fixup_ppc_br24: 39 case PPC::fixup_ppc_br24abs: 40 return Value & 0x3fffffc; 41 case PPC::fixup_ppc_half16: 42 return Value & 0xffff; 43 case PPC::fixup_ppc_half16ds: 44 return Value & 0xfffc; 45 } 46 } 47 48 static unsigned getFixupKindNumBytes(unsigned Kind) { 49 switch (Kind) { 50 default: 51 llvm_unreachable("Unknown fixup kind!"); 52 case FK_Data_1: 53 return 1; 54 case FK_Data_2: 55 case PPC::fixup_ppc_half16: 56 case PPC::fixup_ppc_half16ds: 57 return 2; 58 case FK_Data_4: 59 case PPC::fixup_ppc_brcond14: 60 case PPC::fixup_ppc_brcond14abs: 61 case PPC::fixup_ppc_br24: 62 case PPC::fixup_ppc_br24abs: 63 return 4; 64 case FK_Data_8: 65 return 8; 66 case PPC::fixup_ppc_nofixup: 67 return 0; 68 } 69 } 70 71 namespace { 72 class PPCMachObjectWriter : public MCMachObjectTargetWriter { 73 public: 74 PPCMachObjectWriter(bool Is64Bit, uint32_t CPUType, 75 uint32_t CPUSubtype) 76 : MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype) {} 77 78 void RecordRelocation(MachObjectWriter *Writer, 79 const MCAssembler &Asm, const MCAsmLayout &Layout, 80 const MCFragment *Fragment, const MCFixup &Fixup, 81 MCValue Target, uint64_t &FixedValue) { 82 llvm_unreachable("Relocation emission for MachO/PPC unimplemented!"); 83 } 84 }; 85 86 class PPCAsmBackend : public MCAsmBackend { 87 const Target &TheTarget; 88 public: 89 PPCAsmBackend(const Target &T) : MCAsmBackend(), TheTarget(T) {} 90 91 unsigned getNumFixupKinds() const { return PPC::NumTargetFixupKinds; } 92 93 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const { 94 const static MCFixupKindInfo Infos[PPC::NumTargetFixupKinds] = { 95 // name offset bits flags 96 { "fixup_ppc_br24", 6, 24, MCFixupKindInfo::FKF_IsPCRel }, 97 { "fixup_ppc_brcond14", 16, 14, MCFixupKindInfo::FKF_IsPCRel }, 98 { "fixup_ppc_br24abs", 6, 24, 0 }, 99 { "fixup_ppc_brcond14abs", 16, 14, 0 }, 100 { "fixup_ppc_half16", 0, 16, 0 }, 101 { "fixup_ppc_half16ds", 0, 14, 0 }, 102 { "fixup_ppc_nofixup", 0, 0, 0 } 103 }; 104 105 if (Kind < FirstTargetFixupKind) 106 return MCAsmBackend::getFixupKindInfo(Kind); 107 108 assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() && 109 "Invalid kind!"); 110 return Infos[Kind - FirstTargetFixupKind]; 111 } 112 113 void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize, 114 uint64_t Value) const { 115 Value = adjustFixupValue(Fixup.getKind(), Value); 116 if (!Value) return; // Doesn't change encoding. 117 118 unsigned Offset = Fixup.getOffset(); 119 unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind()); 120 121 // For each byte of the fragment that the fixup touches, mask in the bits 122 // from the fixup value. The Value has been "split up" into the appropriate 123 // bitfields above. 124 for (unsigned i = 0; i != NumBytes; ++i) 125 Data[Offset + i] |= uint8_t((Value >> ((NumBytes - i - 1)*8)) & 0xff); 126 } 127 128 bool mayNeedRelaxation(const MCInst &Inst) const { 129 // FIXME. 130 return false; 131 } 132 133 bool fixupNeedsRelaxation(const MCFixup &Fixup, 134 uint64_t Value, 135 const MCRelaxableFragment *DF, 136 const MCAsmLayout &Layout) const { 137 // FIXME. 138 llvm_unreachable("relaxInstruction() unimplemented"); 139 } 140 141 142 void relaxInstruction(const MCInst &Inst, MCInst &Res) const { 143 // FIXME. 144 llvm_unreachable("relaxInstruction() unimplemented"); 145 } 146 147 bool writeNopData(uint64_t Count, MCObjectWriter *OW) const { 148 // Can't emit NOP with size not multiple of 32-bits 149 if (Count % 4 != 0) 150 return false; 151 152 uint64_t NumNops = Count / 4; 153 for (uint64_t i = 0; i != NumNops; ++i) 154 OW->Write32(0x60000000); 155 156 return true; 157 } 158 159 unsigned getPointerSize() const { 160 StringRef Name = TheTarget.getName(); 161 if (Name == "ppc64" || Name == "ppc64le") return 8; 162 assert(Name == "ppc32" && "Unknown target name!"); 163 return 4; 164 } 165 }; 166 } // end anonymous namespace 167 168 169 // FIXME: This should be in a separate file. 170 namespace { 171 class DarwinPPCAsmBackend : public PPCAsmBackend { 172 public: 173 DarwinPPCAsmBackend(const Target &T) : PPCAsmBackend(T) { } 174 175 MCObjectWriter *createObjectWriter(raw_ostream &OS) const { 176 bool is64 = getPointerSize() == 8; 177 return createMachObjectWriter(new PPCMachObjectWriter( 178 /*Is64Bit=*/is64, 179 (is64 ? object::mach::CTM_PowerPC64 : 180 object::mach::CTM_PowerPC), 181 object::mach::CSPPC_ALL), 182 OS, /*IsLittleEndian=*/false); 183 } 184 185 virtual bool doesSectionRequireSymbols(const MCSection &Section) const { 186 return false; 187 } 188 }; 189 190 class ELFPPCAsmBackend : public PPCAsmBackend { 191 uint8_t OSABI; 192 public: 193 ELFPPCAsmBackend(const Target &T, uint8_t OSABI) : 194 PPCAsmBackend(T), OSABI(OSABI) { } 195 196 197 MCObjectWriter *createObjectWriter(raw_ostream &OS) const { 198 bool is64 = getPointerSize() == 8; 199 return createPPCELFObjectWriter(OS, is64, OSABI); 200 } 201 202 virtual bool doesSectionRequireSymbols(const MCSection &Section) const { 203 return false; 204 } 205 }; 206 207 } // end anonymous namespace 208 209 210 211 212 MCAsmBackend *llvm::createPPCAsmBackend(const Target &T, StringRef TT, StringRef CPU) { 213 if (Triple(TT).isOSDarwin()) 214 return new DarwinPPCAsmBackend(T); 215 216 uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(Triple(TT).getOS()); 217 return new ELFPPCAsmBackend(T, OSABI); 218 } 219
