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    Searched refs:ADDu (Results 1 - 7 of 7) sorted by null

  /external/llvm/lib/Target/Mips/
MipsSERegisterInfo.cpp 119 unsigned ADDu = Subtarget.isABI_N64() ? Mips::DADDu : Mips::ADDu;
125 BuildMI(MBB, II, DL, TII.get(ADDu), Reg).addReg(FrameReg)
MipsSEISelDAGToDAG.cpp 163 // addu $v1, $v0, $t9
168 BuildMI(MBB, I, DL, TII.get(Mips::ADDu), V1).addReg(V0).addReg(Mips::T9);
181 // 2. addu $globalbasereg, $2, $t9
191 // the value instruction 1 (addiu) defines is valid when instruction 2 (addu)
195 BuildMI(MBB, I, DL, TII.get(Mips::ADDu), GlobalBaseReg)
230 SDNode *AddCarry = CurDAG->getMachineNode(Mips::ADDu, DL, VT,
340 Result = selectAddESubE(Mips::ADDu, InFlag, InFlag.getValue(0), DL, Node);
MipsSEFrameLowering.cpp 279 unsigned ADDu = STI.isABI_N64() ? Mips::DADDu : Mips::ADDu;
369 BuildMI(MBB, MBBI, dl, TII.get(ADDu), FP).addReg(SP).addReg(ZERO);
395 unsigned ADDu = STI.isABI_N64() ? Mips::DADDu : Mips::ADDu;
406 BuildMI(MBB, I, dl, TII.get(ADDu), SP).addReg(FP).addReg(ZERO);
MipsSEInstrInfo.cpp 99 Opc = Mips::ADDu, ZeroReg = Mips::ZERO;
319 unsigned ADDu = STI.isABI_N64() ? Mips::DADDu : Mips::ADDu;
326 BuildMI(MBB, I, DL, get(ADDu), SP).addReg(SP).addReg(Reg, RegState::Kill);
513 unsigned ADDU = STI.isABI_N64() ? Mips::DADDu : Mips::ADDu;
522 // addu $ra, $v0, $zero
523 // addu $sp, $sp, $v1
526 BuildMI(MBB, I, I->getDebugLoc(), TM.getInstrInfo()->get(ADDU), T9)
528 BuildMI(MBB, I, I->getDebugLoc(), TM.getInstrInfo()->get(ADDU), RA
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MipsLongBranch.cpp 279 // addu $at, $ra, $at
301 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDu), Mips::AT)
MipsISelLowering.cpp 800 return emitAtomicBinaryPartword(MI, BB, 1, Mips::ADDu);
    [all...]
  /external/llvm/lib/Target/Mips/AsmParser/
MipsAsmParser.cpp 592 // addu d,d,s
604 tmpInst.setOpcode(Mips::ADDu);
698 TempInst.setOpcode(Mips::ADDu);
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