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    Searched refs:AllocateReg (Results 1 - 11 of 11) sorted by null

  /external/llvm/lib/Target/Hexagon/
HexagonCallingConvLower.h 117 /// AllocateReg - Attempt to allocate one register. If it is not available,
120 unsigned AllocateReg(unsigned Reg) {
126 /// Version of AllocateReg with extra register to be shadowed.
127 unsigned AllocateReg(unsigned Reg, unsigned ShadowReg) {
134 /// AllocateReg - Attempt to allocate one of the specified registers. If none
137 unsigned AllocateReg(const unsigned *Regs, unsigned NumRegs) {
148 /// Version of AllocateReg with list of registers to be shadowed.
149 unsigned AllocateReg(const unsigned *Regs, const unsigned *ShadowRegs,
HexagonVarargsCallingConvention.h 56 if (unsigned Reg = State.AllocateReg(RegList1, 6)) {
68 if (unsigned Reg = State.AllocateReg(RegList2, 3)) {
112 if (unsigned Reg = State.AllocateReg(RegList1, 6)) {
124 if (unsigned Reg = State.AllocateReg(RegList2, 3)) {
HexagonISelLowering.cpp 177 if (unsigned Reg = State.AllocateReg(RegList, 6)) {
191 if (unsigned Reg = State.AllocateReg(Hexagon::D0)) {
202 if (unsigned Reg = State.AllocateReg(RegList1, RegList2, 2)) {
248 if (unsigned Reg = State.AllocateReg(Hexagon::R0)) {
263 if (unsigned Reg = State.AllocateReg(Hexagon::D0)) {
    [all...]
  /external/llvm/lib/Target/ARM/
ARMCallingConv.h 34 if (unsigned Reg = State.AllocateReg(RegList, 4))
49 if (unsigned Reg = State.AllocateReg(RegList, 4))
79 unsigned Reg = State.AllocateReg(HiRegList, ShadowRegList, 2);
83 Reg = State.AllocateReg(GPRArgRegs, 4);
102 unsigned T = State.AllocateReg(LoRegList[i]);
129 unsigned Reg = State.AllocateReg(HiRegList, LoRegList, 2);
ARMISelLowering.cpp     [all...]
  /external/llvm/include/llvm/CodeGen/
CallingConvLower.h 288 /// AllocateReg - Attempt to allocate one register. If it is not available,
291 unsigned AllocateReg(unsigned Reg) {
297 /// Version of AllocateReg with extra register to be shadowed.
298 unsigned AllocateReg(unsigned Reg, unsigned ShadowReg) {
305 /// AllocateReg - Attempt to allocate one of the specified registers. If none
308 unsigned AllocateReg(const uint16_t *Regs, unsigned NumRegs) {
319 /// Version of AllocateReg with list of registers to be shadowed.
320 unsigned AllocateReg(const uint16_t *Regs, const uint16_t *ShadowRegs,
  /external/llvm/lib/Target/R600/
SIISelLowering.cpp 192 CCInfo.AllocateReg(AMDGPU::VGPR0);
193 CCInfo.AllocateReg(AMDGPU::VGPR1);
198 CCInfo.AllocateReg(AMDGPU::SGPR0);
199 CCInfo.AllocateReg(AMDGPU::SGPR1);
    [all...]
  /external/llvm/lib/Target/Mips/
MipsISelLowering.cpp     [all...]
  /external/llvm/lib/Target/Sparc/
SparcISelLowering.cpp 58 if (unsigned Reg = State.AllocateReg(RegList, 6)) {
69 if (unsigned Reg = State.AllocateReg(RegList, 6))
    [all...]
  /external/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp     [all...]
  /external/llvm/lib/Target/PowerPC/
PPCISelLowering.cpp     [all...]

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