| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorTypes.cpp | 53 case ISD::EXTRACT_SUBVECTOR: R = ScalarizeVecRes_EXTRACT_SUBVECTOR(N); break;
504 case ISD::EXTRACT_SUBVECTOR: SplitVecRes_EXTRACT_SUBVECTOR(N, Lo, Hi); break;
712 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, LoVT, Vec, Idx);
714 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, HiVT, Vec,
857 LL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
859 LH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
[all...] |
| LegalizeTypesGeneric.cpp | 82 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
84 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
496 CL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VCondTy, Cond,
498 CH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VCondTy, Cond,
|
| SelectionDAGDumper.cpp | 192 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
|
| SelectionDAGBuilder.cpp | 283 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, ValueVT, Val,
548 Ops[i] = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL,
[all...] |
| LegalizeIntegerTypes.cpp | 80 case ISD::EXTRACT_SUBVECTOR:
[all...] |
| DAGCombiner.cpp | [all...] |
| LegalizeDAG.cpp | [all...] |
| SelectionDAG.cpp | [all...] |
| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 267 /// EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR (an
270 EXTRACT_SUBVECTOR,
[all...] |
| /external/llvm/lib/Target/R600/ |
| AMDGPUISelLowering.cpp | 82 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v2i32, Expand);
83 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v2f32, Expand);
|
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 122 setOperationAction(ISD::EXTRACT_SUBVECTOR, VT, Legal);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 76 // Extract the relevant vectorWidth bits. Generate an EXTRACT_SUBVECTOR
90 SDValue Result = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, ResultVT, Vec,
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | [all...] |
