| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 442 /// FLOG, FLOG2, FLOG10, FEXP, FEXP2,
446 FLOG, FLOG2, FLOG10, FEXP, FEXP2,
[all...] |
| /ndk/sources/host-tools/nawk-20071023/ |
| awk.h | 117 #define FEXP 3
|
| lex.c | 59 { "exp", FEXP, BLTIN },
|
| run.c | [all...] |
| /external/llvm/lib/CodeGen/ |
| BasicTargetTransformInfo.cpp | 440 case Intrinsic::exp: ISD = ISD::FEXP; break;
|
| TargetLoweringBase.cpp | 703 setOperationAction(ISD::FEXP , MVT::f16, Expand);
713 setOperationAction(ISD::FEXP , MVT::f32, Expand);
723 setOperationAction(ISD::FEXP , MVT::f64, Expand);
733 setOperationAction(ISD::FEXP , MVT::f128, Expand);
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 145 case ISD::FEXP: return "fexp";
|
| LegalizeVectorOps.cpp | 238 case ISD::FEXP:
|
| LegalizeFloatTypes.cpp | 74 case ISD::FEXP: R = SoftenFloatRes_FEXP(N); break;
[all...] |
| LegalizeVectorTypes.cpp | 74 case ISD::FEXP:
530 case ISD::FEXP:
[all...] |
| LegalizeDAG.cpp | [all...] |
| SelectionDAGBuilder.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 182 setOperationAction(ISD::FEXP, MVT::f32, Expand);
183 setOperationAction(ISD::FEXP, MVT::f64, Expand);
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 338 setOperationAction(ISD::FEXP, MVT::f32, Expand);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 499 setOperationAction(ISD::FEXP, MVT::v2f64, Expand);
517 setOperationAction(ISD::FEXP, MVT::v4f32, Expand);
534 setOperationAction(ISD::FEXP, MVT::v2f32, Expand);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 406 setOperationAction(ISD::FEXP, VT, Expand);
[all...] |
