/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 382 /// X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type 385 /// normal rounding, if it is 1, this FP_ROUND is known to not change the 391 /// FP_EXTEND(FP_ROUND(X,1)) -> X which are not safe for 392 /// FP_EXTEND(FP_ROUND(X,0)) because the extra bits aren't removed. 393 FP_ROUND, [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
LegalizeFloatTypes.cpp | 85 case ISD::FP_ROUND: R = SoftenFloatRes_FP_ROUND(N); break; 391 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_ROUND!"); 611 case ISD::FP_ROUND: Res = SoftenFloatOp_FP_ROUND(N); break; 645 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_ROUND libcall"); [all...] |
LegalizeVectorTypes.cpp | 54 case ISD::FP_ROUND: R = ScalarizeVecRes_FP_ROUND(N); break; 185 return DAG.getNode(ISD::FP_ROUND, SDLoc(N), 539 case ISD::FP_ROUND: [all...] |
SelectionDAGDumper.cpp | 216 case ISD::FP_ROUND: return "fp_round";
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LegalizeVectorOps.cpp | 245 case ISD::FP_ROUND:
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LegalizeDAG.cpp | [all...] |
DAGCombiner.cpp | 461 case ISD::FP_ROUND: 540 case ISD::FP_ROUND: 541 return DAG.getNode(ISD::FP_ROUND, SDLoc(Op), Op.getValueType(), [all...] |
SelectionDAG.cpp | [all...] |
SelectionDAGBuilder.cpp | 202 // FP_ROUND's are always exact here. 204 return DAG.getNode(ISD::FP_ROUND, DL, ValueVT, Val, [all...] |
/external/llvm/lib/Target/ARM/ |
ARMTargetTransformInfo.cpp | 187 { ISD::FP_ROUND, MVT::v2f64, 2 }, 192 if (Src->isVectorTy() && ST->hasNEON() && (ISD == ISD::FP_ROUND ||
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ARMISelLowering.cpp | 564 setOperationAction(ISD::FP_ROUND, MVT::v2f32, Expand); [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.cpp | 223 setOperationAction(ISD::FP_ROUND, MVT::f128, Expand); 252 setOperationAction(ISD::FP_ROUND, MVT::f32, Custom); 253 setOperationAction(ISD::FP_ROUND, MVT::f64, Custom); [all...] |
/external/llvm/lib/Target/R600/ |
R600ISelLowering.cpp | 92 setTargetDAGCombine(ISD::FP_ROUND); [all...] |
/external/llvm/lib/CodeGen/ |
TargetLoweringBase.cpp | [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelDAGToDAG.cpp | 491 if (N->getOpcode() != ISD::FP_ROUND && N->getOpcode() != ISD::FP_EXTEND) 523 if (N->getOpcode() == ISD::FP_ROUND) 524 MemVT = DstVT; // FP_ROUND must use DstVT, we can't do a 'trunc load'. 540 // We're about to replace all uses of the FP_ROUND/FP_EXTEND with the [all...] |
X86ISelLowering.cpp | [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | 98 // from FP_ROUND: that rounds to nearest, this rounds to zero. [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonISelLowering.cpp | [all...] |