| /external/llvm/lib/Target/ARM/ |
| ARMTargetTransformInfo.cpp | 260 { ISD::FP_TO_UINT, MVT::v4i32, MVT::v4f32, 1 },
262 { ISD::FP_TO_UINT, MVT::v4i8, MVT::v4f32, 3 },
264 { ISD::FP_TO_UINT, MVT::v4i16, MVT::v4f32, 2 },
278 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f64, 2 },
280 { ISD::FP_TO_UINT, MVT::v8i16, MVT::v8f32, 4 },
282 { ISD::FP_TO_UINT, MVT::v16i16, MVT::v16f32, 8 }
296 { ISD::FP_TO_UINT, MVT::i1, MVT::f32, 2 },
298 { ISD::FP_TO_UINT, MVT::i1, MVT::f64, 2 },
300 { ISD::FP_TO_UINT, MVT::i8, MVT::f32, 2 },
302 { ISD::FP_TO_UINT, MVT::i8, MVT::f64, 2 }
[all...] |
| ARMISelLowering.cpp | 112 setOperationAction(ISD::FP_TO_UINT, VT, Custom);
117 setOperationAction(ISD::FP_TO_UINT, VT, Expand);
561 setOperationAction(ISD::FP_TO_UINT, MVT::v4i16, Custom);
606 setTargetDAGCombine(ISD::FP_TO_UINT);
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 380 FP_TO_UINT,
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 224 case ISD::FP_TO_UINT: return "fp_to_uint";
|
| LegalizeVectorTypes.cpp | 84 case ISD::FP_TO_UINT:
541 case ISD::FP_TO_UINT:
[all...] |
| LegalizeVectorOps.cpp | 227 case ISD::FP_TO_UINT:
|
| LegalizeIntegerTypes.cpp | 98 case ISD::FP_TO_UINT: Res = PromoteIntRes_FP_TO_XINT(N); break;
356 // If we're promoting a UINT to a larger size and the larger FP_TO_UINT is
360 if (N->getOpcode() == ISD::FP_TO_UINT &&
361 !TLI.isOperationLegal(ISD::FP_TO_UINT, NVT) &&
370 return DAG.getNode(N->getOpcode() == ISD::FP_TO_UINT ?
[all...] |
| LegalizeFloatTypes.cpp | 613 case ISD::FP_TO_UINT: Res = SoftenFloatOp_FP_TO_UINT(N); break;
685 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_UINT!");
[all...] |
| LegalizeDAG.cpp | [all...] |
| DAGCombiner.cpp | [all...] |
| SelectionDAG.cpp | [all...] |
| SelectionDAGBuilder.cpp | [all...] |
| /external/llvm/lib/Target/R600/ |
| AMDGPUISelLowering.cpp | 108 setOperationAction(ISD::FP_TO_UINT, VT, Expand);
|
| R600ISelLowering.cpp | 70 setOperationAction(ISD::FP_TO_UINT, MVT::i1, Custom);
720 case ISD::FP_TO_UINT: Results.push_back(LowerFPTOUINT(N->getOperand(0), DAG));
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 243 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom);
244 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Custom);
245 setOperationAction(ISD::FP_TO_UINT, MVT::i128, Custom);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 367 // Handle FP_TO_UINT by promoting the destination to a larger signed
369 setOperationAction(ISD::FP_TO_UINT , MVT::i1 , Promote);
370 setOperationAction(ISD::FP_TO_UINT , MVT::i8 , Promote);
371 setOperationAction(ISD::FP_TO_UINT , MVT::i16 , Promote);
374 setOperationAction(ISD::FP_TO_UINT , MVT::i64 , Expand);
375 setOperationAction(ISD::FP_TO_UINT , MVT::i32 , Promote);
379 // Expand FP_TO_UINT into a select.
382 setOperationAction(ISD::FP_TO_UINT , MVT::i32 , Expand);
386 setOperationAction(ISD::FP_TO_UINT , MVT::i32 , Custom);
392 setOperationAction(ISD::FP_TO_UINT , MVT::i64 , Custom)
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 319 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Expand);
324 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom);
329 // PowerPC does not have FP_TO_UINT on 32-bit implementations.
330 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand);
337 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Custom);
343 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom);
455 setOperationAction(ISD::FP_TO_UINT, MVT::v4i32, Legal);
[all...] |
| /external/llvm/lib/CodeGen/ |
| TargetLoweringBase.cpp | [all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 304 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand);
305 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Expand);
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 136 setOperationAction(ISD::FP_TO_UINT, VT, Expand);
[all...] |
