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  /external/llvm/lib/Target/Mips/
MipsAnalyzeImmediate.cpp 79 // Replace a ADDiu & SLL pair with a LUi.
84 // LUi 0x444
100 Seq[0].Opc = LUi;
133 LUi = Mips::LUi;
138 LUi = Mips::LUi64;
MipsAnalyzeImmediate.h 50 /// ReplaceADDiuSLLWithLUi - Replace an ADDiu & SLL pair with a LUi.
58 unsigned ADDiu, ORi, SLL, LUi;
MipsSEInstrInfo.cpp 340 unsigned LUi = STI.isABI_N64() ? Mips::LUi64 : Mips::LUi;
352 // The first instruction can be a LUi, which is different from other
357 if (Inst->Opc == LUi)
358 BuildMI(MBB, II, DL, get(LUi), Reg).addImm(SignExtend64<16>(Inst->ImmOpnd));
MipsLongBranch.cpp 276 // lui $at, %hi($tgt - $baltgt)
295 .append(BuildMI(*MF, DL, TII->get(Mips::LUi), Mips::AT).addImm(Hi));
399 BuildMI(MBB, I, DL, TII->get(Mips::LUi), Mips::V0)
MipsSEISelDAGToDAG.cpp 133 // lui $v0, %hi(%neg(%gp_rel(fname)))
149 // lui $v0, %hi(__gnu_local_gp)
151 BuildMI(MBB, I, DL, TII.get(Mips::LUi), V0)
162 // lui $v0, %hi(%neg(%gp_rel(fname)))
166 BuildMI(MBB, I, DL, TII.get(Mips::LUi), V0)
179 // 0. lui $2, %hi(_gp_disp)
283 // lui $2, %hi($CPI1_0)
287 // lui $2, %hi($CPI1_0)
382 // The first instruction can be a LUi which is different from other
MipsCodeEmitter.cpp 170 if (Form == MipsII::FrmI && MI.getOpcode() == Mips::LUi)
  /external/llvm/lib/Target/Mips/AsmParser/
MipsAsmParser.cpp 554 // li d,j => lui d,hi16(j)
556 tmpInst.setOpcode(Mips::LUi);
590 // la d,j(s) => lui d,hi16(j)
593 tmpInst.setOpcode(Mips::LUi);
630 // la d,j => lui d,hi16(j)
632 tmpInst.setOpcode(Mips::LUi);
673 // 1st instruction in expansion is LUi. For load instruction we can use
677 TempInst.setOpcode(Mips::LUi);
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