/external/chromium_org/v8/src/mips/ |
constants-mips.cc | 335 case LWR:
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constants-mips.h | 290 LWR = ((4 << 3) + 6) << kOpcodeShift,
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simulator-mips.cc | [all...] |
assembler-mips.cc | 1411 void Assembler::lwr(Register rd, const MemOperand& rs) { function in class:v8::Assembler [all...] |
/external/v8/src/mips/ |
constants-mips.cc | 329 case LWR:
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constants-mips.h | 287 LWR = ((4 << 3) + 6) << kOpcodeShift,
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simulator-mips.cc | [all...] |
assembler-mips.cc | 1404 void Assembler::lwr(Register rd, const MemOperand& rs) { function in class:v8::Assembler [all...] |
/external/llvm/lib/Target/Mips/ |
MipsISelLowering.h | 157 LWR,
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MipsISelLowering.cpp | 184 case MipsISD::LWR: return "MipsISD::LWR"; [all...] |
/external/valgrind/main/none/tests/mips32/ |
MIPS32int.stdout.exp | 306 LWR 307 lwr $t0, 0($t1) :: rt 0x121f1e1f 308 lwr $t0, 4($t1) :: rt 0x00000000 309 lwr $t0, 8($t1) :: rt 0x00000003 310 lwr $t0, 12($t1) :: rt 0xffffffff 311 lwr $t0, 16($t1) :: rt 0x232f2e2f 312 lwr $t0, 20($t1) :: rt 0x242c2b2b 313 lwr $t0, 24($t1) :: rt 0x252a2e2b 314 lwr $t0, 28($t1) :: rt 0x262d2d2a 315 lwr $t0, 32($t1) :: rt 0x3f343f3 [all...] |