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    Searched refs:Mov (Results 1 - 8 of 8) sorted by null

  /external/llvm/lib/Target/R600/
AMDGPUIndirectAddressing.cpp 14 /// to either a COPY or a MOV that uses indirect addressing.
115 MachineInstrBuilder MOV = TII->buildIndirectWrite(BB, I,
122 MOV.addReg(DstReg, RegState::Define | RegState::Implicit);
303 MachineInstrBuilder Mov = TII->buildIndirectRead(BB, I,
310 Mov.addReg(IndirectReg, RegState::Implicit | RegState::Kill);
311 Mov.addReg(LiveAddressRegisterMap[Address], RegState::Implicit);
R600InstrInfo.cpp 66 buildDefaultInstruction(MBB, MI, AMDGPU::MOV,
73 MachineInstr *NewMI = buildDefaultInstruction(MBB, MI, AMDGPU::MOV,
82 MachineInstr * MI = MF->CreateMachineInstr(get(AMDGPU::MOV), DebugLoc());
101 case AMDGPU::MOV:
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SIISelLowering.cpp 642 MachineSDNode *Mov = dyn_cast<MachineSDNode>(Operand);
645 if (Mov == 0 || !TII->isMov(Mov->getMachineOpcode()))
648 const SDValue &Op = Mov->getOperand(0);
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  /external/llvm/lib/Target/ARM/
ARMBaseInstrInfo.cpp 710 MachineInstrBuilder Mov;
728 Mov = BuildMI(MBB, I, I->getDebugLoc(), get(Opc), Dst)
732 Mov.addReg(Src);
733 Mov = AddDefaultPred(Mov);
736 Mov = AddDefaultCC(Mov);
739 Mov->addRegisterDefined(DestReg, TRI);
741 Mov->addRegisterKilled(SrcReg, TRI);
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  /external/valgrind/main/VEX/priv/
host_arm_defs.c     [all...]
host_arm_defs.h 652 /* MOV dst, src -- reg-reg (or reg-imm8x4) move */
656 } Mov;
710 /* Mov src to dst on the given condition, which may not
803 /* 64-bit FP mov src to dst on the given condition, which may
810 /* 32-bit FP mov src to dst on the given condition, which may
  /art/compiler/utils/arm/
assembler_arm.h 250 void mov(Register rd, ShifterOperand so, Condition cond = AL);
415 void Mov(Register rd, Register rm, Condition cond = AL);
417 // Convenience shift instructions. Use mov instruction with shifter operand
assembler_arm.cc 223 static_cast<int32_t>(MOV) << kOpcodeShift |
240 static_cast<int32_t>(MOV) << kOpcodeShift |
359 void ArmAssembler::mov(Register rd, ShifterOperand so, Condition cond) { function in class:art::arm::ArmAssembler
360 EmitType01(cond, so.type(), MOV, 0, R0, rd, so);
365 EmitType01(cond, so.type(), MOV, 1, R0, rd, so);
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