| /external/llvm/lib/Target/X86/ |
| X86FixupLEAs.cpp | 98 MachineInstr* NewMI;
104 NewMI = BuildMI(*MF, MI->getDebugLoc(),
108 MFI->insert(MBBI, NewMI); // Insert the new inst
109 return NewMI;
233 MachineInstr* NewMI = postRAConvertToLEA(MFI, MBI);
234 if (NewMI) {
238 DEBUG(dbgs() << "Replaced by: "; NewMI->dump(););
241 static_cast<MachineBasicBlock::iterator> (NewMI);
|
| X86InstrInfo.cpp | [all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| R600ExpandSpecialInstrs.cpp | 150 MachineInstr *NewMI =
156 NewMI->setIsInsideBundle(Chan != 0);
157 TII->addFlag(NewMI, 0, Flags);
|
| R600ISelLowering.cpp | 64 MachineInstr *NewMI =
70 TII->addFlag(NewMI, 0, MO_FLAG_CLAMP);
75 MachineInstr *NewMI =
81 TII->addFlag(NewMI, 1, MO_FLAG_ABS);
87 MachineInstr *NewMI =
93 TII->addFlag(NewMI, 1, MO_FLAG_NEG);
206 MachineInstr *NewMI =
212 TII->addFlag(NewMI, 1, MO_FLAG_PUSH);
220 MachineInstr *NewMI =
226 TII->addFlag(NewMI, 1, MO_FLAG_PUSH)
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| R600ExpandSpecialInstrs.cpp | 150 MachineInstr *NewMI =
156 NewMI->setIsInsideBundle(Chan != 0);
157 TII->addFlag(NewMI, 0, Flags);
|
| R600ISelLowering.cpp | 64 MachineInstr *NewMI =
70 TII->addFlag(NewMI, 0, MO_FLAG_CLAMP);
75 MachineInstr *NewMI =
81 TII->addFlag(NewMI, 1, MO_FLAG_ABS);
87 MachineInstr *NewMI =
93 TII->addFlag(NewMI, 1, MO_FLAG_NEG);
206 MachineInstr *NewMI =
212 TII->addFlag(NewMI, 1, MO_FLAG_PUSH);
220 MachineInstr *NewMI =
226 TII->addFlag(NewMI, 1, MO_FLAG_PUSH)
[all...] |
| /external/llvm/lib/CodeGen/ |
| TargetInstrInfo.cpp | 119 bool NewMI) const {
157 if (NewMI) {
366 if (MachineInstr *NewMI = foldMemoryOperandImpl(MF, MI, Ops, FI)) {
369 NewMI->mayStore()) &&
372 NewMI->mayLoad()) &&
380 NewMI->addMemOperand(MF, MMO);
382 // FIXME: change foldMemoryOperandImpl semantics to also insert NewMI.
383 return MBB->insert(MI, NewMI);
421 MachineInstr *NewMI = foldMemoryOperandImpl(MF, MI, Ops, LoadMI);
422 if (!NewMI) return 0
[all...] |
| RegisterCoalescer.cpp | 646 MachineInstr *NewMI = TII->commuteInstruction(DefMI);
647 if (!NewMI)
653 if (NewMI != DefMI) {
654 LIS->ReplaceMachineInstrInMaps(DefMI, NewMI);
656 MBB->insert(Pos, NewMI);
659 unsigned OpIdx = NewMI->findRegisterUseOperandIdx(IntA.reg, false);
660 NewMI->getOperand(OpIdx).setIsKill();
800 MachineInstr *NewMI = prior(MII);
802 LIS->ReplaceMachineInstrInMaps(CopyMI, NewMI);
806 // NewMI may have dead implicit defs (E.g. EFLAGS for MOV<bits>r0 on X86)
[all...] |
| TwoAddressInstructionPass.cpp | 579 MachineInstr *NewMI = TII->commuteInstruction(MI);
581 if (NewMI == 0) {
586 DEBUG(dbgs() << "2addr: COMMUTED TO: " << *NewMI);
587 assert(NewMI == MI &&
627 MachineInstr *NewMI = TII->convertToThreeAddress(MFI, mi, LV);
629 if (!NewMI)
633 DEBUG(dbgs() << "2addr: TO 3-ADDR: " << *NewMI);
637 LIS->ReplaceMachineInstrInMaps(mi, NewMI);
639 if (NewMI->findRegisterUseOperand(RegB, false, TRI))
643 Sunk = sink3AddrInstruction(NewMI, RegB, mi)
[all...] |
| MachineCSE.cpp | 462 MachineInstr *NewMI = TII->commuteInstruction(MI);
463 if (NewMI) {
465 FoundCSE = VNT.count(NewMI);
466 if (NewMI != MI) {
468 NewMI->eraseFromParent();
|
| TailDuplication.cpp | 422 MachineInstr *NewMI = TII->duplicate(MI, MF);
423 for (unsigned i = 0, e = NewMI->getNumOperands(); i != e; ++i) {
424 MachineOperand &MO = NewMI->getOperand(i);
445 PredBB->insert(PredBB->instr_end(), NewMI);
[all...] |
| /external/llvm/lib/Target/R600/ |
| SIInstrInfo.h | 41 bool NewMI=false) const;
|
| R600ExpandSpecialInstrs.cpp | 300 MachineInstr *NewMI =
304 NewMI->bundleWithPred();
306 TII->addFlag(NewMI, 0, MO_FLAG_MASK);
309 TII->addFlag(NewMI, 0, MO_FLAG_NOT_LAST);
|
| SIInstrInfo.cpp | 186 bool NewMI) const {
192 MI = TargetInstrInfo::commuteInstruction(MI, NewMI);
|
| R600ISelLowering.cpp | 116 MachineInstr *NewMI = TII->buildDefaultInstruction(*BB, I,
120 TII->addFlag(NewMI, 0, MO_FLAG_CLAMP);
125 MachineInstr *NewMI = TII->buildDefaultInstruction(*BB, I,
129 TII->addFlag(NewMI, 0, MO_FLAG_ABS);
134 MachineInstr *NewMI = TII->buildDefaultInstruction(*BB, I,
138 TII->addFlag(NewMI, 0, MO_FLAG_NEG);
151 MachineInstrBuilder NewMI = BuildMI(*BB, I, BB->findDebugLoc(I),
155 NewMI.addOperand(MI->getOperand(i));
173 MachineInstr *NewMI = TII->buildDefaultInstruction(*BB, MI, AMDGPU::MOV,
175 TII->setImmOperand(NewMI, AMDGPU::OpName::src0_sel
[all...] |
| AMDILCFGStructurizer.cpp | 502 MachineInstr *NewMI = MF->CreateMachineInstr(TII->get(NewOpcode), DL);
503 MBB->insert(I, NewMI);
504 MachineInstrBuilder MIB(*MF, NewMI);
506 SHOWNEWINSTR(NewMI);
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonNewValueJump.cpp | 599 MachineInstr *NewMI;
610 NewMI = BuildMI(*MBB, jmpPos, dl,
621 NewMI = BuildMI(*MBB, jmpPos, dl,
627 NewMI = BuildMI(*MBB, jmpPos, dl,
633 assert(NewMI && "New Value Jump Instruction Not created!");
634 (void)NewMI;
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64FrameLowering.cpp | 240 MachineInstr *NewMI = prior(MBBI);
242 MBBI = NewMI;
461 MachineInstrBuilder NewMI;
476 NewMI = BuildMI(MBB, MBBI, DL, TII.get(PossClasses[ClassIdx].PairOpcode))
490 NewMI = BuildMI(MBB, MBBI, DL,
507 NewMI.addFrameIndex(FrameIdx)
512 NewMI.setMIFlags(MachineInstr::FrameSetup);
|
| AArch64InstrInfo.cpp | 352 MachineInstr *NewMI =
357 llvm::finalizeBundle(MBB, NewMI, *++MBBI);
406 MachineInstrBuilder NewMI = BuildMI(MBB, MBBI, DL, get(StoreOp));
407 NewMI.addReg(SrcReg, getKillRegState(isKill))
452 MachineInstrBuilder NewMI = BuildMI(MBB, MBBI, DL, get(LoadOp), DestReg);
453 NewMI.addFrameIndex(FrameIdx)
|
| /external/llvm/lib/Target/ARM/ |
| A15SDOptimizer.cpp | 388 MachineInstr *NewMI = MRI->getVRegDef(Reg);
389 if (!NewMI)
391 Front.push_back(NewMI);
396 MachineInstr *NewMI = MRI->getVRegDef(MI->getOperand(1).getReg());
397 if (!NewMI)
399 Front.push_back(NewMI);
|
| ARMBaseInstrInfo.cpp | 244 MachineInstr *NewMI = (Reg == WBReg) ? UpdateMI : MemMI;
246 LV->addVirtualRegisterDead(Reg, NewMI);
251 MachineInstr *NewMI = NewMIs[j];
252 if (!NewMI->readsRegister(Reg))
254 LV->addVirtualRegisterKilled(Reg, NewMI);
256 VI.Kills.push_back(NewMI);
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| LiveIntervalAnalysis.h | 232 void ReplaceMachineInstrInMaps(MachineInstr *MI, MachineInstr *NewMI) {
233 Indexes->replaceMachineInstrInMaps(MI, NewMI);
|
| LiveVariables.h | 192 MachineInstr *NewMI);
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.h | 107 virtual MachineInstr *commuteInstruction(MachineInstr *MI, bool NewMI) const;
|
| /external/llvm/lib/Target/ARM/InstPrinter/ |
| ARMInstPrinter.cpp | 257 MCInst NewMI;
259 NewMI.setOpcode(Opcode);
262 NewMI.addOperand(MI->getOperand(0));
265 NewMI.addOperand(NewReg);
267 // Copy the rest operands into NewMI.
269 NewMI.addOperand(MI->getOperand(i));
270 printInstruction(&NewMI, O);
[all...] |
