| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorTypes.cpp | 150 EVT NewVT = N->getValueType(0).getVectorElementType();
152 NewVT, N->getOperand(0));
166 EVT NewVT = N->getValueType(0).getVectorElementType();
168 return DAG.getConvertRndSat(NewVT, SDLoc(N),
169 Op0, DAG.getValueType(NewVT),
183 EVT NewVT = N->getValueType(0).getVectorElementType();
186 NewVT, Op, N->getOperand(1));
[all...] |
| LegalizeTypesGeneric.cpp | 213 EVT NewVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldVT);
226 NewVT, 2*OldElts),
233 Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx);
237 Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx);
344 EVT NewVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldVT);
366 NewVT, NewElts.size()),
|
| DAGCombiner.cpp | [all...] |
| SelectionDAG.cpp | [all...] |
| LegalizeDAG.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| TargetLoweringBase.cpp | 805 MVT NewVT = MVT::getVectorVT(EltTy, NumElts);
806 if (!TLI->isTypeLegal(NewVT))
807 NewVT = EltTy;
808 IntermediateVT = NewVT;
810 unsigned NewVTSize = NewVT.getSizeInBits();
816 MVT DestVT = TLI->getRegisterType(NewVT);
818 if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16.
[all...] |
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineCalls.cpp | 668 VectorType *NewVT = cast<VectorType>(II->getType());
669 unsigned NewWidth = NewVT->getElementType()->getIntegerBitWidth();
682 ConstantInt::get(NewVT->getElementType(), CV0E * CV1E));
[all...] |
| /external/llvm/lib/Target/R600/ |
| R600ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | [all...] |
