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    Searched refs:OperIdx (Results 1 - 4 of 4) sorted by null

  /external/llvm/include/llvm/CodeGen/
ScheduleDAGInstrs.h 227 void addPhysRegDataDeps(SUnit *SU, unsigned OperIdx);
228 void addPhysRegDeps(SUnit *SU, unsigned OperIdx);
229 void addVRegDefDeps(SUnit *SU, unsigned OperIdx);
230 void addVRegUseDeps(SUnit *SU, unsigned OperIdx);
  /external/llvm/lib/CodeGen/
ScheduleDAGInstrs.cpp 244 void ScheduleDAGInstrs::addPhysRegDataDeps(SUnit *SU, unsigned OperIdx) {
245 const MachineOperand &MO = SU->getInstr()->getOperand(OperIdx);
275 SchedModel.computeOperandLatency(SU->getInstr(), OperIdx, RegUse,
286 /// depend the physical register referenced at OperIdx.
287 void ScheduleDAGInstrs::addPhysRegDeps(SUnit *SU, unsigned OperIdx) {
289 const MachineOperand &MO = MI->getOperand(OperIdx);
314 SchedModel.computeOutputLatency(MI, OperIdx, DefSU->getInstr()));
326 Uses.insert(PhysRegSUOper(SU, OperIdx, MO.getReg()));
329 addPhysRegDataDeps(SU, OperIdx);
356 Defs.insert(PhysRegSUOper(SU, OperIdx, Reg))
    [all...]
  /external/llvm/lib/Transforms/Utils/
SimplifyIndVar.cpp 91 unsigned OperIdx = 0;
100 if (IVOperand != UseInst->getOperand(OperIdx) ||
137 UseInst->setOperand(OperIdx, IVSrc);
  /external/llvm/utils/TableGen/
CodeGenSchedule.cpp     [all...]

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